From patchwork Fri Oct 9 10:06:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mugunthan V N X-Patchwork-Id: 7360621 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C467D9F65E for ; Fri, 9 Oct 2015 10:08:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 626F120898 for ; Fri, 9 Oct 2015 10:08:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 49FD820896 for ; Fri, 9 Oct 2015 10:08:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757278AbbJIKIL (ORCPT ); Fri, 9 Oct 2015 06:08:11 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:37053 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757235AbbJIKII (ORCPT ); Fri, 9 Oct 2015 06:08:08 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t99A86Ki031812; Fri, 9 Oct 2015 05:08:06 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t99A85PQ008881; Fri, 9 Oct 2015 05:08:06 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Fri, 9 Oct 2015 05:08:05 -0500 Received: from mugunthan-pc.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t99A83Ee018408; Fri, 9 Oct 2015 05:08:04 -0500 From: Mugunthan V N To: CC: , "David S . Miller" , Sekhar Nori , Mugunthan V N Subject: [net-next PATCH] driver: net: cpsw: add no_bd_ram dt parsing Date: Fri, 9 Oct 2015 15:36:46 +0530 Message-ID: <1444385206-7011-1-git-send-email-mugunthanvnm@ti.com> X-Mailer: git-send-email 2.6.1.133.gf5b6079 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP cpdma is capable of placing the dma descriptors in ddr using dma_alloc_coherent() when the internal bd ram size is not enough. To utilize this feature pass the DT parameter "no_bd_ram" and increase bd_ram_size and number of rx descriptors. Signed-off-by: Mugunthan V N --- drivers/net/ethernet/ti/cpsw.c | 4 ++++ drivers/net/ethernet/ti/cpsw.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 8fc90f1..cf1a625 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1987,6 +1987,8 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, } data->ale_entries = prop; + data->no_bd_ram = of_property_read_bool(node, "no_bd_ram"); + if (of_property_read_u32(node, "bd_ram_size", &prop)) { dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); return -EINVAL; @@ -2358,6 +2360,8 @@ static int cpsw_probe(struct platform_device *pdev) dma_params.desc_mem_size = data->bd_ram_size; dma_params.desc_align = 16; dma_params.has_ext_regs = true; + if (data->no_bd_ram) + dma_params.desc_mem_phys = 0; dma_params.desc_hw_addr = dma_params.desc_mem_phys; priv->dma = cpdma_ctlr_create(&dma_params); diff --git a/drivers/net/ethernet/ti/cpsw.h b/drivers/net/ethernet/ti/cpsw.h index ca90efa..b654ac2 100644 --- a/drivers/net/ethernet/ti/cpsw.h +++ b/drivers/net/ethernet/ti/cpsw.h @@ -33,6 +33,7 @@ struct cpsw_platform_data { u32 cpts_clock_mult; /* convert input clock ticks to nanoseconds */ u32 cpts_clock_shift; /* convert input clock ticks to nanoseconds */ u32 ale_entries; /* ale table size */ + bool no_bd_ram; /* set if cpsw bd ram should not be used */ u32 bd_ram_size; /*buffer descriptor ram size */ u32 rx_descs; /* Number of Rx Descriptios */ u32 mac_control; /* Mac control register */