diff mbox

[1/3] ARM: OMAP2+: Fix SoC detection for dra62x j5-eco

Message ID 1449184300-15693-2-git-send-email-tony@atomide.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tony Lindgren Dec. 3, 2015, 11:11 p.m. UTC
We can boot dra62x j5-eco using the dm814x code as the clocks and
devices are mapped in the device tree. The dra62x is also known
as jacinto 5.

We may want to add separate soc_is macros for dra62x if needed,
but this gets us to the point where we can boot dra62x with just
dts changes.

Let's also print out the unknown hawkeye register to make things
a bit easier for new SoC variants.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/id.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Matthijs van Duin Dec. 4, 2015, 2:43 a.m. UTC | #1
On 4 December 2015 at 00:11, Tony Lindgren <tony@atomide.com> wrote:
> We can boot dra62x j5-eco using the dm814x code as the clocks and
> devices are mapped in the device tree. The dra62x is also known
> as jacinto 5.

I'm pretty sure the "eco" in the name isn't optional. As far as I know:
jacinto 5 = dra65x ~ dm814x
jacinto 5 eco = dra62x ~ dm811x
jacinto 5 entry = dra61x/60x ~ am335x

Here ~ means equivalence modulo efuse bits.

My knowledge of TI's automotive processors is limited however, as is
public documentation, so perhaps someone from TI can ack or nak this.

Matthijs
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Tony Lindgren Dec. 4, 2015, 3:46 p.m. UTC | #2
* Matthijs van Duin <matthijsvanduin@gmail.com> [151203 18:44]:
> On 4 December 2015 at 00:11, Tony Lindgren <tony@atomide.com> wrote:
> > We can boot dra62x j5-eco using the dm814x code as the clocks and
> > devices are mapped in the device tree. The dra62x is also known
> > as jacinto 5.
> 
> I'm pretty sure the "eco" in the name isn't optional. As far as I know:
> jacinto 5 = dra65x ~ dm814x
> jacinto 5 eco = dra62x ~ dm811x
> jacinto 5 entry = dra61x/60x ~ am335x
> 
> Here ~ means equivalence modulo efuse bits.
> 
> My knowledge of TI's automotive processors is limited however, as is
> public documentation, so perhaps someone from TI can ack or nak this.

OK I'll update to to use "jacinto 5 eco" specifically to avoid more
confusion.

Thanks,

Tony
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 8a2ae82..d85c249 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -488,6 +488,7 @@  void __init omap3xxx_check_revision(void)
 		}
 		break;
 	case 0xb8f2:
+	case 0xb968:
 		switch (rev) {
 		case 0:
 		/* FALLTHROUGH */
@@ -511,7 +512,8 @@  void __init omap3xxx_check_revision(void)
 		/* Unknown default to latest silicon rev as default */
 		omap_revision = OMAP3630_REV_ES1_2;
 		cpu_rev = "1.2";
-		pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
+		pr_warn("Warning: unknown chip type: hawkeye %04x, assuming OMAP3630ES1.2\n",
+			hawkeye);
 	}
 	sprintf(soc_rev, "ES%s", cpu_rev);
 }