From patchwork Mon Mar 13 11:53:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 9620579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CD66E60414 for ; Mon, 13 Mar 2017 11:54:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BDDE32843D for ; Mon, 13 Mar 2017 11:54:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B18A928456; Mon, 13 Mar 2017 11:54:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 486C92843D for ; Mon, 13 Mar 2017 11:54:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751541AbdCMLxi (ORCPT ); Mon, 13 Mar 2017 07:53:38 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:32888 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752554AbdCMLxd (ORCPT ); Mon, 13 Mar 2017 07:53:33 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2DBrUK0011612; Mon, 13 Mar 2017 06:53:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489406010; bh=Ic3kJQeBg+j/TpRmLS1or4rfB22YLn0nfYLb+0u3DAo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YytRvxPlTTt5StHquly26lp0YxbtyFw1SBn96wa5wt2EyQjiRuaRxCdkc5f7fBxbB BhbP462eOtirIKTE/v7u/GTMl0mOXjTWXwmjBbUgkhzaFNTfEo/Ngiq8LLuTaix0AI 9lVbw4PjCxZwMchDJrGl7nAeD+tBbQWzL+oeil/I= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrU2o008395; Mon, 13 Mar 2017 06:53:30 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Mar 2017 06:53:29 -0500 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrH2D025695; Mon, 13 Mar 2017 06:53:27 -0500 From: Roger Quadros To: , CC: , , , , , Roger Quadros Subject: [PATCH 4/4] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss Date: Mon, 13 Mar 2017 13:53:16 +0200 Message-ID: <1489405996-10718-5-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489405996-10718-1-git-send-email-rogerq@ti.com> References: <1489405996-10718-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss is in use then there are random chances that the usb_otg_ss module will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3. Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use fixes this issue. We don't know yet if usb_otg_ss instances 3 and 4 are affected by this issue or not so don't add this flag for those instances. Cc: Tero Kristo Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 896f238..2d1141a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -2702,6 +2702,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss1_hwmod = { .class = &dra7xx_usb_otg_ss_hwmod_class, .clkdm_name = "l3init_clkdm", .main_clk = "dpll_core_h13x2_ck", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET, @@ -2723,6 +2724,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss2_hwmod = { .class = &dra7xx_usb_otg_ss_hwmod_class, .clkdm_name = "l3init_clkdm", .main_clk = "dpll_core_h13x2_ck", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,