From patchwork Wed Nov 7 05:04:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 10671839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79E5F1751 for ; Wed, 7 Nov 2018 05:04:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68B0F29010 for ; Wed, 7 Nov 2018 05:04:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D5F7292A9; Wed, 7 Nov 2018 05:04:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66A93290E1 for ; Wed, 7 Nov 2018 05:04:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388263AbeKGOdd (ORCPT ); Wed, 7 Nov 2018 09:33:33 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:43370 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387848AbeKGOdd (ORCPT ); Wed, 7 Nov 2018 09:33:33 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id wA754iD7041617; Tue, 6 Nov 2018 23:04:44 -0600 Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wA754iOk114180 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 6 Nov 2018 23:04:44 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 6 Nov 2018 23:04:44 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 6 Nov 2018 23:04:44 -0600 Received: from ula0393675.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wA754djY014128; Tue, 6 Nov 2018 23:04:42 -0600 From: Keerthy To: CC: , , , , , , Subject: [PATCH 1/6] ARM: dts: am437x-gp-evm: Add state for ddr3 vtt toggle pin Date: Wed, 7 Nov 2018 10:34:15 +0530 Message-ID: <1541567060-5671-2-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1541567060-5671-1-git-send-email-j-keerthy@ti.com> References: <1541567060-5671-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dave Gerlach Add pinctrl data for ddr_vtt_toggle pin so that it is configured for proper state during DeepSleep0. The pin should enter DS0 off mode and hold the line low so VTT regulator is kept off while suspended. It is also important for the PULLUP to be set on this pin so that on removal of isolation, the VTT line is pulled high as a requirement for bringing the DDR3 out of self-refresh. This toggling is dependent on the IO isolation controlled by the wkup_m3. Without placing the IOs into isolation the DS0 states set for the pin will not be latched into effect during suspend. Signed-off-by: Dave Gerlach Signed-off-by: Keerthy --- arch/arm/boot/dts/am437x-gp-evm.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index 601bf4d..d119f2a 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -162,9 +162,15 @@ &am43xx_pinmux { pinctrl-names = "default", "sleep"; - pinctrl-0 = <&wlan_pins_default>; + pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default>; pinctrl-1 = <&wlan_pins_sleep>; + ddr3_vtt_toggle_default: ddr_vtt_toggle_default { + pinctrl-single,pins = < + 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */ + >; + }; + i2c0_pins: i2c0_pins { pinctrl-single,pins = < AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */