From patchwork Wed Nov 28 10:45:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 10702313 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EC5C713A4 for ; Wed, 28 Nov 2018 10:45:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC8E42D03C for ; Wed, 28 Nov 2018 10:45:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D0BAB2D03F; Wed, 28 Nov 2018 10:45:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A1E12D03C for ; Wed, 28 Nov 2018 10:45:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727868AbeK1Vqs (ORCPT ); Wed, 28 Nov 2018 16:46:48 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38902 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727673AbeK1Vqs (ORCPT ); Wed, 28 Nov 2018 16:46:48 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id wASAjI4J052230; Wed, 28 Nov 2018 04:45:18 -0600 Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wASAjIW1060363 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Nov 2018 04:45:18 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 28 Nov 2018 04:45:17 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 28 Nov 2018 04:45:17 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wASAjFns003175; Wed, 28 Nov 2018 04:45:16 -0600 From: Tero Kristo To: , CC: , Subject: [PATCH] ARM: dts: dra7: Move the ti,no-idle quirk on proper gmac node Date: Wed, 28 Nov 2018 12:45:07 +0200 Message-ID: <1543401907-14751-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hwmod parses the DT hierarchically from root to search for matching ti,hwmod property. With the introduction of L4 data, we have two nodes with the ti,hwmod = "gmac" declaration, and the hwmod core only matches the first one found, which is the target-module one. This node incorrectly dropped the ti,no-idle flag, which causes number of problems, like ignoring errata i877, and also causing an intermittent boot failure on certain dra7 boards. Fix the issue by moving the ti,no-idle flag to the proper node. Signed-off-by: Tero Kristo Reported-by: Grygorii Strashko Reviewed-by: Grygorii Strashko --- FYI: The problem is seen in linux-next. arch/arm/boot/dts/dra7-l4.dtsi | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi index 7e5c0d4f..6c01ada 100644 --- a/arch/arm/boot/dts/dra7-l4.dtsi +++ b/arch/arm/boot/dts/dra7-l4.dtsi @@ -3021,6 +3021,14 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x84000 0x4000>; + /* + * Do not allow gating of cpsw clock as workaround + * for errata i877. Keeping internal clock disabled + * causes the device switching characteristics + * to degrade over time and eventually fail to meet + * the data manual delay time/skew specs. + */ + ti,no-idle; mac: ethernet@0 { compatible = "ti,dra7-cpsw","ti,cpsw"; @@ -3040,15 +3048,6 @@ #size-cells = <1>; /* - * Do not allow gating of cpsw clock as workaround - * for errata i877. Keeping internal clock disabled - * causes the device switching characteristics - * to degrade over time and eventually fail to meet - * the data manual delay time/skew specs. - */ - ti,no-idle; - - /* * rx_thresh_pend * rx_pend * tx_pend