From patchwork Wed Aug 7 07:48:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081403 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 996F21399 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C2CB287A8 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8081A287E9; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27D92287A8 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387485AbfHGHtn (ORCPT ); Wed, 7 Aug 2019 03:49:43 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38130 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387476AbfHGHtn (ORCPT ); Wed, 7 Aug 2019 03:49:43 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777ncFQ074735; Wed, 7 Aug 2019 02:49:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164178; bh=j1DK25VG8GHT3iyJbCCQsEPONPyb/wUHsKRxTsAZCgs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bglMYFDufOIGFwVVvXH8fi6eM6KQtdODnEpzPApBX4QnECOVJwZ0Ivc09+SOhrWor uFE65I9H85uUHQ9fwZrMQh67CAjzOp0vzY9sRVXUkqLhJWeMRXNq1zdHXaB5rUcXph WooucnN3g4qbfBAsE4E+z2GDqz7K4VwWNOBqLRos= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777ncqN078773 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:38 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:38 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:38 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHk118711; Wed, 7 Aug 2019 02:49:36 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 8/8] ARM: OMAP2+: pdata-quirks: add PRM data for reset support Date: Wed, 7 Aug 2019 10:48:59 +0300 Message-ID: <1565164139-21886-9-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The parent clockdomain for reset must be in force wakeup mode, otherwise the reset may never complete. Add pdata quirks for this purpose for PRM driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/pdata-quirks.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 6c6f8fc..87e2457 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "clockdomain.h" #include "common.h" @@ -565,6 +566,12 @@ void omap_pcs_legacy_init(int irq, void (*rearm)(void)) pcs_pdata.rearm = rearm; } +static struct ti_prm_platform_data ti_prm_pdata = { + .clkdm_deny_idle = clkdm_deny_idle, + .clkdm_allow_idle = clkdm_allow_idle, + .clkdm_lookup = clkdm_lookup, +}; + /* * GPIOs for TWL are initialized by the I2C bus and need custom * handing until DSS has device tree bindings. @@ -664,6 +671,9 @@ static void __init omap3_mcbsp_init(void) {} /* Common auxdata */ OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata), OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,dra7-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,am3-prm-inst", 0, NULL, &ti_prm_pdata), { /* sentinel */ }, };