From patchwork Sat Aug 15 11:19:38 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 41599 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n7FBQL90013288 for ; Sat, 15 Aug 2009 11:26:22 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753496AbZHOL0Q (ORCPT ); Sat, 15 Aug 2009 07:26:16 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753382AbZHOL0P (ORCPT ); Sat, 15 Aug 2009 07:26:15 -0400 Received: from utopia.booyaka.com ([72.9.107.138]:32949 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753090AbZHOL0N (ORCPT ); Sat, 15 Aug 2009 07:26:13 -0400 Received: (qmail 30594 invoked by uid 526); 15 Aug 2009 11:26:13 -0000 MBOX-Line: From nobody Sat Aug 15 14:19:38 2009 Subject: [PATCH 02/13] OMAP: SDRC: Add several new register definitions To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.arm.linux.org.uk, linux-arm@vger.kernel.org From: Paul Walmsley Cc: Tero Kristo , Kevin Hilman Date: Sat, 15 Aug 2009 14:19:38 +0300 Message-ID: <20090815111843.7384.7271.stgit@localhost.localdomain> In-Reply-To: <20090815111704.7384.31564.stgit@localhost.localdomain> References: <20090815111704.7384.31564.stgit@localhost.localdomain> User-Agent: StGit/0.15-rc1-9-gd8846-dirty MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add missing SDRC register offset macros. Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman [paul@pwsan.com: added commit message] Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/mach/sdrc.h | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 0be18e4..8fff90a 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -21,19 +21,28 @@ /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ #define SDRC_SYSCONFIG 0x010 +#define SDRC_CS_CFG 0x040 +#define SDRC_SHARING 0x044 +#define SDRC_ERR_TYPE 0x04C #define SDRC_DLLA_CTRL 0x060 #define SDRC_DLLA_STATUS 0x064 #define SDRC_DLLB_CTRL 0x068 #define SDRC_DLLB_STATUS 0x06C #define SDRC_POWER 0x070 +#define SDRC_MCFG_0 0x080 #define SDRC_MR_0 0x084 +#define SDRC_EMR2_0 0x08c #define SDRC_ACTIM_CTRL_A_0 0x09c #define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 +#define SDRC_MANUAL_0 0x0a8 +#define SDRC_MCFG_1 0x0B0 #define SDRC_MR_1 0x0B4 +#define SDRC_EMR2_1 0x0BC #define SDRC_ACTIM_CTRL_A_1 0x0C4 #define SDRC_ACTIM_CTRL_B_1 0x0C8 #define SDRC_RFR_CTRL_1 0x0D4 +#define SDRC_MANUAL_1 0x0D8 /* * These values represent the number of memory clock cycles between