diff mbox

[alsa-devel] Audio capture not working with AIC23/McBSP1 on OMAP3517

Message ID 20090826180141.37dca666.jhnikula@gmail.com (mailing list archive)
State Awaiting Upstream, archived
Headers show

Commit Message

Jarkko Nikula Aug. 26, 2009, 3:01 p.m. UTC
On Wed, 26 Aug 2009 16:42:39 +0300
Jarkko Nikula <jhnikula@gmail.com> wrote:

> Those recent patches should not any effect into this since they are
> mostly playing with the McBSP and DMA interfacing. What comes to my
> mind if muxing is correct and if codec is master, this might be related
> to those McBSP1 FSR and CLKR setup.
> 
Anuj: I think the issue is here that by default McBSP1 receiver is
using the CLKR and FSR pins and if those are not connected, then the
capture doesn't work. Can you try a patch below and add following lines
into your machine driver?

snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_CLKR_SRC_CLKX, 0,
SND_SOC_CLOCK_IN);
snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
SND_SOC_CLOCK_IN);

Patch is compile tested only, generated against mainline 2.6.31-rc7 but should
apply to ALSA tree as well.

Comments

Aggarwal, Anuj Aug. 27, 2009, 9:37 a.m. UTC | #1
Thanks Jarkko, the patch works for me.

I will be submitting my ASoC omap*.c file soon after making all 
the necessary changes.

Regards,
Anuj Aggarwal


> -----Original Message-----
> From: Jarkko Nikula [mailto:jhnikula@gmail.com]
> Sent: Wednesday, August 26, 2009 8:32 PM
> To: Aggarwal, Anuj
> Cc: Mark Brown; alsa-devel@alsa-project.org; linux-omap@vger.kernel.org
> Subject: Re: [alsa-devel] Audio capture not working with AIC23/McBSP1 on
> OMAP3517
> 
> On Wed, 26 Aug 2009 16:42:39 +0300
> Jarkko Nikula <jhnikula@gmail.com> wrote:
> 
> > Those recent patches should not any effect into this since they are
> > mostly playing with the McBSP and DMA interfacing. What comes to my
> > mind if muxing is correct and if codec is master, this might be related
> > to those McBSP1 FSR and CLKR setup.
> >
> Anuj: I think the issue is here that by default McBSP1 receiver is
> using the CLKR and FSR pins and if those are not connected, then the
> capture doesn't work. Can you try a patch below and add following lines
> into your machine driver?
> 
> snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_CLKR_SRC_CLKX, 0,
> SND_SOC_CLOCK_IN);
> snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
> SND_SOC_CLOCK_IN);
> 
> Patch is compile tested only, generated against mainline 2.6.31-rc7 but
> should
> apply to ALSA tree as well.
> 
> 
> --
> Jarkko
> 
> ==================== CUT HERE ====================
> From: Jarkko Nikula <jhnikula@gmail.com>
> Subject: [PATCH] ASoC: OMAP: Add functionality to set CLKR and FSR sources
> in McBSP DAI
> 
> The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have
> specifications to check it) have additional CLKR and FSR pins for McBSP1
> receiver. Reset default is that receiver is using bit clock and frame
> sync signal from those pins but it is possible to configure to use
> also CLKX and FSX pins as well. In fact, other McBSP ports are doing that
> internally that transmitter and receiver share the CLKX and FSX.
> 
> Add functionaly that machine drivers can set the CLKR and FSR sources by
> using the snd_soc_dai_set_sysclk.
> 
> Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue.
> 
> Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
> ---
>  sound/soc/omap/omap-mcbsp.c |   41
> +++++++++++++++++++++++++++++++++++++++++
>  sound/soc/omap/omap-mcbsp.h |    4 ++++
>  2 files changed, 45 insertions(+), 0 deletions(-)
> 
> diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
> index a5d46a7..2ea2136 100644
> --- a/sound/soc/omap/omap-mcbsp.c
> +++ b/sound/soc/omap/omap-mcbsp.c
> @@ -462,6 +462,40 @@ static int omap_mcbsp_dai_set_clks_src(struct
> omap_mcbsp_data *mcbsp_data,
>  	return 0;
>  }
> 
> +static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data
> *mcbsp_data,
> +				       int clk_id)
> +{
> +	int sel_bit, set = 0;
> +	u16 reg = OMAP2_CONTROL_DEVCONF0;
> +
> +	if (cpu_class_is_omap1())
> +		return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
> +	if (mcbsp_data->bus_id != 0)
> +		return -EINVAL;
> +
> +	switch (clk_id) {
> +	case OMAP_MCBSP_CLKR_SRC_CLKX:
> +		set = 1;
> +	case OMAP_MCBSP_CLKR_SRC_CLKR:
> +		sel_bit = 3;
> +		break;
> +	case OMAP_MCBSP_FSR_SRC_FSX:
> +		set = 1;
> +	case OMAP_MCBSP_FSR_SRC_FSR:
> +		sel_bit = 4;
> +		break;
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	if (set)
> +		omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
> +	else
> +		omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
> +
> +	return 0;
> +}
> +
>  static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
>  					 int clk_id, unsigned int freq,
>  					 int dir)
> @@ -484,6 +518,13 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct
> snd_soc_dai *cpu_dai,
>  	case OMAP_MCBSP_SYSCLK_CLKR_EXT:
>  		regs->pcr0	|= SCLKME;
>  		break;
> +
> +	case OMAP_MCBSP_CLKR_SRC_CLKR:
> +	case OMAP_MCBSP_CLKR_SRC_CLKX:
> +	case OMAP_MCBSP_FSR_SRC_FSR:
> +	case OMAP_MCBSP_FSR_SRC_FSX:
> +		err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
> +		break;
>  	default:
>  		err = -ENODEV;
>  	}
> diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h
> index c8147aa..647d2f9 100644
> --- a/sound/soc/omap/omap-mcbsp.h
> +++ b/sound/soc/omap/omap-mcbsp.h
> @@ -32,6 +32,10 @@ enum omap_mcbsp_clksrg_clk {
>  	OMAP_MCBSP_SYSCLK_CLK,		/* Internal ICLK */
>  	OMAP_MCBSP_SYSCLK_CLKX_EXT,	/* External CLKX pin */
>  	OMAP_MCBSP_SYSCLK_CLKR_EXT,	/* External CLKR pin */
> +	OMAP_MCBSP_CLKR_SRC_CLKR,	/* CLKR from CLKR pin */
> +	OMAP_MCBSP_CLKR_SRC_CLKX,	/* CLKR from CLKX pin */
> +	OMAP_MCBSP_FSR_SRC_FSR,		/* FSR from FSR pin */
> +	OMAP_MCBSP_FSR_SRC_FSX,		/* FSR from FSX pin */
>  };
> 
>  /* McBSP dividers */
> --
> 1.6.3.3
> 

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Jarkko Nikula Aug. 27, 2009, 11:12 a.m. UTC | #2
On Thu, 27 Aug 2009 15:07:32 +0530
"Aggarwal, Anuj" <anuj.aggarwal@ti.com> wrote:

> Thanks Jarkko, the patch works for me.
> 
This is nice to hear.

Can you, Peter or who has access to 2420 and 2430 TRMs to verify is the
DEVCONF0 bits 3 and 4 selecting there also the McBSP1 CLKR and FSR
sources like my patch is now assuming for all OMAP2-3.
Peter Ujfalusi Aug. 28, 2009, 6:55 a.m. UTC | #3
On Thursday 27 August 2009 14:12:53 ext Jarkko Nikula wrote:
> On Thu, 27 Aug 2009 15:07:32 +0530
>
> "Aggarwal, Anuj" <anuj.aggarwal@ti.com> wrote:
> > Thanks Jarkko, the patch works for me.
>
> This is nice to hear.
>
> Can you, Peter or who has access to 2420 and 2430 TRMs to verify is the
> DEVCONF0 bits 3 and 4 selecting there also the McBSP1 CLKR and FSR
> sources like my patch is now assuming for all OMAP2-3.

On OMAP2:
DEVCONF:3 MCBSP1_CLKR
DEVCONF:4 MCBSP1_FSR

So it is correct for  both OMAP2 and OMAP3.
Jarkko Nikula Aug. 28, 2009, 10:51 a.m. UTC | #4
On Fri, 28 Aug 2009 09:55:01 +0300
Peter Ujfalusi <peter.ujfalusi@nokia.com> wrote:

> > Can you, Peter or who has access to 2420 and 2430 TRMs to verify is the
> > DEVCONF0 bits 3 and 4 selecting there also the McBSP1 CLKR and FSR
> > sources like my patch is now assuming for all OMAP2-3.
> 
> On OMAP2:
> DEVCONF:3 MCBSP1_CLKR
> DEVCONF:4 MCBSP1_FSR
> 
> So it is correct for  both OMAP2 and OMAP3.
> 
Good :-)

Are you Mark fine with the patch [] where the snd_soc_dai_set_sysclk
is used to specify source pin for CLKR and FSR?
Mark Brown Aug. 28, 2009, 12:05 p.m. UTC | #5
On Fri, Aug 28, 2009 at 01:51:03PM +0300, Jarkko Nikula wrote:

> Are you Mark fine with the patch [] where the snd_soc_dai_set_sysclk
> is used to specify source pin for CLKR and FSR?

Yes, that's OK.  Could you re-send the patch, I don't think I've got a
local copy any more?
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diff mbox

Patch

==================== CUT HERE ====================
From: Jarkko Nikula <jhnikula@gmail.com>
Subject: [PATCH] ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI

The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have
specifications to check it) have additional CLKR and FSR pins for McBSP1
receiver. Reset default is that receiver is using bit clock and frame
sync signal from those pins but it is possible to configure to use
also CLKX and FSX pins as well. In fact, other McBSP ports are doing that
internally that transmitter and receiver share the CLKX and FSX.

Add functionaly that machine drivers can set the CLKR and FSR sources by
using the snd_soc_dai_set_sysclk.

Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
---
 sound/soc/omap/omap-mcbsp.c |   41 +++++++++++++++++++++++++++++++++++++++++
 sound/soc/omap/omap-mcbsp.h |    4 ++++
 2 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index a5d46a7..2ea2136 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -462,6 +462,40 @@  static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
 	return 0;
 }
 
+static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data *mcbsp_data,
+				       int clk_id)
+{
+	int sel_bit, set = 0;
+	u16 reg = OMAP2_CONTROL_DEVCONF0;
+
+	if (cpu_class_is_omap1())
+		return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
+	if (mcbsp_data->bus_id != 0)
+		return -EINVAL;
+
+	switch (clk_id) {
+	case OMAP_MCBSP_CLKR_SRC_CLKX:
+		set = 1;
+	case OMAP_MCBSP_CLKR_SRC_CLKR:
+		sel_bit = 3;
+		break;
+	case OMAP_MCBSP_FSR_SRC_FSX:
+		set = 1;
+	case OMAP_MCBSP_FSR_SRC_FSR:
+		sel_bit = 4;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (set)
+		omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
+	else
+		omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
+
+	return 0;
+}
+
 static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
 					 int clk_id, unsigned int freq,
 					 int dir)
@@ -484,6 +518,13 @@  static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
 	case OMAP_MCBSP_SYSCLK_CLKR_EXT:
 		regs->pcr0	|= SCLKME;
 		break;
+
+	case OMAP_MCBSP_CLKR_SRC_CLKR:
+	case OMAP_MCBSP_CLKR_SRC_CLKX:
+	case OMAP_MCBSP_FSR_SRC_FSR:
+	case OMAP_MCBSP_FSR_SRC_FSX:
+		err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
+		break;
 	default:
 		err = -ENODEV;
 	}
diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h
index c8147aa..647d2f9 100644
--- a/sound/soc/omap/omap-mcbsp.h
+++ b/sound/soc/omap/omap-mcbsp.h
@@ -32,6 +32,10 @@  enum omap_mcbsp_clksrg_clk {
 	OMAP_MCBSP_SYSCLK_CLK,		/* Internal ICLK */
 	OMAP_MCBSP_SYSCLK_CLKX_EXT,	/* External CLKX pin */
 	OMAP_MCBSP_SYSCLK_CLKR_EXT,	/* External CLKR pin */
+	OMAP_MCBSP_CLKR_SRC_CLKR,	/* CLKR from CLKR pin */
+	OMAP_MCBSP_CLKR_SRC_CLKX,	/* CLKR from CLKX pin */
+	OMAP_MCBSP_FSR_SRC_FSR,		/* FSR from FSR pin */
+	OMAP_MCBSP_FSR_SRC_FSX,		/* FSR from FSX pin */
 };
 
 /* McBSP dividers */