[2/2] omap: iommu-add functionality to get TLB miss interrupt

Commit Message

Hiroshi DOYU May 21, 2010, 5:45 a.m. UTC

None

Patch

diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 3cfe1c4..c87f662 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -66,7 +66,7 @@ 
 	 ((pgsz) == MMU_CAM_PGSZ_4K)  ? 0xfffff000 : 0)
 
 
-static void omap2_iommu_set_twl(struct iommu *obj, bool on)
+static void __iommu_set_twl(struct iommu *obj, bool on)
 {
 	u32 l = iommu_read_reg(obj, MMU_CNTL);
 
@@ -121,7 +121,7 @@  static int omap2_iommu_enable(struct iommu *obj)
 
 	iommu_write_reg(obj, pa, MMU_TTB);
 
-	omap2_iommu_set_twl(obj, true);
+	__iommu_set_twl(obj, true);
 
 	return 0;
 }
@@ -137,6 +137,11 @@  static void omap2_iommu_disable(struct iommu *obj)
 	dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
 }
 
+static void omap2_iommu_set_twl(struct iommu *obj, bool on)
+{
+	__iommu_set_twl(obj, on);
+}
+
 static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
 {
 	int i;