From patchwork Wed Aug 18 07:19:16 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 120084 X-Patchwork-Delegate: me@felipebalbi.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o7I7KUA1001761 for ; Wed, 18 Aug 2010 07:20:30 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751681Ab0HRHU2 (ORCPT ); Wed, 18 Aug 2010 03:20:28 -0400 Received: from mgw-sa02.nokia.com ([147.243.1.48]:43507 "EHLO mgw-sa02.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750961Ab0HRHU1 (ORCPT ); Wed, 18 Aug 2010 03:20:27 -0400 Received: from nokia.com (localhost [127.0.0.1]) by mgw-sa02.nokia.com (Switch-3.4.3/Switch-3.4.3) with ESMTP id o7I7FYn4000365; Wed, 18 Aug 2010 10:16:04 +0300 Received: from nokia.com ([esdhcp041223.research.nokia.com [172.21.41.223]]) by mgw-sa02.nokia.com with RELAY id o7I7FXce000312 ; Wed, 18 Aug 2010 10:15:35 +0300 Date: Wed, 18 Aug 2010 10:19:16 +0300 From: Felipe Balbi To: "Balbi Felipe (Nokia-MS/Helsinki)" Cc: Samuel Ortiz , "linux-kernel@vger.kernel.org" , "linux-omap@vger.kernel.org" , Tony Lindgren , Andrew Morton Subject: Re: [PATCH 1/4] i2c: twl: add register defines for pm master module Message-ID: <20100818071916.GF11947@nokia.com> Reply-To: felipe.balbi@nokia.com References: <1282112377-1335-1-git-send-email-felipe.balbi@nokia.com> <1282112377-1335-2-git-send-email-felipe.balbi@nokia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1282112377-1335-2-git-send-email-felipe.balbi@nokia.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 18 Aug 2010 07:20:30 +0000 (UTC) diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 6de90bf..9b17244 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -357,6 +357,52 @@ int twl6030_interrupt_mask(u8 bit_mask, u8 offset); /*----------------------------------------------------------------------*/ +/* + * PM Master module register offsets (use TWL4030_MODULE_PM_MASTER) + */ + +#define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x00 +#define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x01 +#define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x02 +#define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x03 +#define TWL4030_PM_MASTER_STS_BOOT 0x04 +#define TWL4030_PM_MASTER_CFG_BOOT 0x05 +#define TWL4030_PM_MASTER_SHUNDAN 0x06 +#define TWL4030_PM_MASTER_BOOT_BCI 0x07 +#define TWL4030_PM_MASTER_CFG_PWRANA1 0x08 +#define TWL4030_PM_MASTER_CFG_PWRANA2 0x09 +#define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x0b +#define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x0c +#define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x0d +#define TWL4030_PM_MASTER_PROTECT_KEY 0x0e +#define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x0f +#define TWL4030_PM_MASTER_P1_SW_EVENTS 0x10 +#define TWL4030_PM_MASTER_P2_SW_EVENTS 0x11 +#define TWL4030_PM_MASTER_P3_SW_EVENTS 0x12 +#define TWL4030_PM_MASTER_STS_P123_STATE 0x13 +#define TWL4030_PM_MASTER_PB_CFG 0x14 +#define TWL4030_PM_MASTER_PB_WORD_MSB 0x15 +#define TWL4030_PM_MASTER_PB_WORD_LSB 0x16 +#define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x1c +#define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x1d +#define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x1e +#define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x1f +#define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x20 +#define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x21 +#define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x22 +#define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x23 +#define TWL4030_PM_MASTER_MEMORY_DATA 0x24 + +#define TWL4030_PM_MASTER_KEY_CFG1 0xc0 +#define TWL4030_PM_MASTER_KEY_CFG2 0x0c + +#define TWL4030_PM_MASTER_KEY_TST1 0xe0 +#define TWL4030_PM_MASTER_KEY_TST2 0x0e + +#define TWL4030_PM_MASTER_GLOBAL_TST 0xb6 + +/*----------------------------------------------------------------------*/ + /* Power bus message definitions */ /* The TWL4030/5030 splits its power-management resources (the various