@@ -58,7 +58,8 @@ static struct omap_mmc_platform_data mmc1_data = {
.dma_mask = 0xffffffff,
.slots[0] = {
.set_power = mmc_set_power,
- .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 |
+ .ocr_mask = MMC_VDD_28_29 | MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32 |
MMC_VDD_32_33 | MMC_VDD_33_34,
.name = "mmcblk",
},
@@ -40,7 +40,8 @@ static struct omap_mmc_platform_data mmc1_data = {
.dma_mask = 0xffffffff,
.slots[0] = {
.set_power = mmc_set_power,
- .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 |
+ .ocr_mask = MMC_VDD_28_29 | MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32 |
MMC_VDD_32_33 | MMC_VDD_33_34,
.name = "mmcblk",
},
@@ -410,7 +410,8 @@ static struct omap_mmc_platform_data htc_mmc1_data = {
.nr_slots = 1,
.switch_slot = NULL,
.slots[0] = {
- .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 |
+ .ocr_mask = MMC_VDD_28_29 | MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32 |
MMC_VDD_32_33 | MMC_VDD_33_34,
.name = "mmcblk",
.nomux = 1,
@@ -44,7 +44,8 @@ static struct omap_mmc_platform_data mmc1_data = {
.nr_slots = 1,
.slots[0] = {
.set_power = mmc_set_power,
- .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 |
+ .ocr_mask = MMC_VDD_28_29 | MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32 |
MMC_VDD_32_33 | MMC_VDD_33_34,
.name = "mmcblk",
},
@@ -493,7 +493,8 @@ static struct omap_mmc_platform_data mmc1_data = {
.set_bus_mode = n8x0_mmc_set_bus_mode,
.get_cover_state = n8x0_mmc_get_cover_state,
.ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
- MMC_VDD_32_33 | MMC_VDD_33_34,
+ MMC_VDD_31_32 | MMC_VDD_32_33 |
+ MMC_VDD_33_34,
.name = "internal",
},
.slots[1] = {