From patchwork Wed Dec 8 01:49:21 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 388172 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB81nu9L018616 for ; Wed, 8 Dec 2010 01:49:56 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932215Ab0LHBt3 (ORCPT ); Tue, 7 Dec 2010 20:49:29 -0500 Received: from mho-01-ewr.mailhop.org ([204.13.248.71]:21171 "EHLO mho-01-ewr.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756268Ab0LHBt1 (ORCPT ); Tue, 7 Dec 2010 20:49:27 -0500 Received: from c-24-130-172-179.hsd1.ca.comcast.net ([24.130.172.179] helo=localhost.localdomain) by mho-01-ewr.mailhop.org with esmtpa (Exim 4.68) (envelope-from ) id 1PQ99r-000JgU-3p; Wed, 08 Dec 2010 01:49:27 +0000 Received: from Mutt by mutt-smtp-wrapper.pl 1.2 (www.zdo.com/articles/mutt-smtp-wrapper.shtml) X-Mail-Handler: MailHop Outbound by DynDNS X-Originating-IP: 24.130.172.179 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/mailhop/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX181yUEaOVOTSyU0Q9oP53g7 Date: Tue, 7 Dec 2010 17:49:21 -0800 From: Tony Lindgren To: Nicolas Pitre Cc: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Subject: [PATCH 3/3] omap2+: Initialize omap_irq_base for entry-macro.S from platform code Message-ID: <20101208014921.GM17435@atomide.com> References: <20101204001435.28853.29616.stgit@baageli.muru.com> <20101204180541.GH17222@atomide.com> <20101205031002.GP17222@atomide.com> <20101208014548.GJ17435@atomide.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20101208014548.GJ17435@atomide.com> User-Agent: Mutt/1.5.20 (2009-06-14) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 08 Dec 2010 01:49:57 +0000 (UTC) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 06e64e1..6032941 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -38,41 +38,27 @@ */ #ifdef MULTI_OMAP2 + +/* + * We use __glue to avoid errors with multiple definitions of + * .globl omap_irq_base as it's included from entry-armv.S but not + * from entry-common.S. + */ +#ifdef __glue .pushsection .data -omap_irq_base: .word 0 + .globl omap_irq_base +omap_irq_base: + .word 0 .popsection +#endif - /* Configure the interrupt base on the first interrupt */ + /* + * Configure the interrupt base on the first interrupt. + * See also omap_irq_base_init for setting omap_irq_base. + */ .macro get_irqnr_preamble, base, tmp -9: ldr \base, =omap_irq_base @ irq base address ldr \base, [\base, #0] @ irq base value - cmp \base, #0 @ already configured? - bne 9997f @ nothing to do - - mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision - and \tmp, \tmp, #0x000f0000 @ only check architecture - cmp \tmp, #0x00070000 @ is v6? - beq 2400f @ found v6 so it's omap24xx - mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision - and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9 - cmp \tmp, #0x00000080 @ cortex A-8? - beq 3400f @ found A-8 so it's omap34xx - cmp \tmp, #0x00000090 @ cortex A-9? - beq 4400f @ found A-9 so it's omap44xx -2400: ldr \base, =OMAP2_IRQ_BASE - ldr \tmp, =omap_irq_base - str \base, [\tmp, #0] - b 9b -3400: ldr \base, =OMAP3_IRQ_BASE - ldr \tmp, =omap_irq_base - str \base, [\tmp, #0] - b 9b -4400: ldr \base, =OMAP4_IRQ_BASE - ldr \tmp, =omap_irq_base - str \base, [\tmp, #0] - b 9b -9997: .endm /* Check the pending interrupts. Note that base already set */ diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 40562dd..3d18349 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -46,6 +46,7 @@ #include "clockdomains.h" #include +#include /* * The machine specific code may provide the extra mapping besides the @@ -311,6 +312,25 @@ static int __init _omap2_init_reprogram_sdrc(void) return v; } +/* + * Initialize asm_irq_base for entry-macro.S + */ +static inline void omap_irq_base_init(void) +{ + extern void __iomem *omap_irq_base; + +#ifdef MULTI_OMAP2 + if (cpu_is_omap242x()) + omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); + else if (cpu_is_omap34xx()) + omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE); + else if (cpu_is_omap44xx()) + omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); + else + pr_err("Could not initialize omap_irq_base\n"); +#endif +} + void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { @@ -352,4 +372,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, _omap2_init_reprogram_sdrc(); } gpmc_init(); + + omap_irq_base_init(); }