From patchwork Tue Feb 15 11:04:53 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 558611 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1FB5FRL014111 for ; Tue, 15 Feb 2011 11:05:19 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752690Ab1BOLFO (ORCPT ); Tue, 15 Feb 2011 06:05:14 -0500 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:41965 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752090Ab1BOLFN (ORCPT ); Tue, 15 Feb 2011 06:05:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=VqQfwlU0NJ88QhkIL1z4Hop7tLbyX8Nu2K1I4PU0XZU=; b=ZN145XtSrdtNu1+xkSwTEjUfdGjvAL7qYfspJbIZHi+gpvKNw8rYB7nnGKuwmgQE9qLEmBztho0uwDFVhz6Aynbsn60SaUpCYUjLB04fBb83+ucjzV7+Dxz8w4uo3MR8qRHIq0UQDSd/zy1kNEXPi8l7LFhy7BJM4t8TMM6TWjE=; Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1PpIiF-0008RN-E5; Tue, 15 Feb 2011 11:04:55 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.72) (envelope-from ) id 1PpIiE-0003be-4W; Tue, 15 Feb 2011 11:04:54 +0000 Date: Tue, 15 Feb 2011 11:04:53 +0000 From: Russell King - ARM Linux To: Colin Cross Cc: Eric Miao , Kukjin Kim , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 2/6] ARM: pm: add generic CPU suspend/resume support Message-ID: <20110215110453.GB11199@n2100.arm.linux.org.uk> References: <20110211161626.GA31356@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.19 (2009-01-05) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 15 Feb 2011 11:05:19 +0000 (UTC) diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index bed1876..193be5f 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -4,6 +4,7 @@ #include #include #include +#include .text /* @@ -81,25 +82,22 @@ ENTRY(cpu_resume_mmu) str r3, [r2, r4, lsl #2] @ setup 1:1 mapping for mmu code sub r2, r2, r1 ldr r3, =cpu_resume_after_mmu + bic r1, r0, #CR_C @ ensure D-cache is disabled b cpu_resume_turn_mmu_on ENDPROC(cpu_resume_mmu) .ltorg .align 5 cpu_resume_turn_mmu_on: - mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, caches, etc - mrc p15, 0, r0, c0, c0, 0 @ read id reg - mov r0, r0 - mov r0, r0 + mcr p15, 0, r1, c1, c0, 0 @ turn on MMU, I-cache, etc + mrc p15, 0, r1, c0, c0, 0 @ read id reg + mov r1, r1 + mov r1, r1 mov pc, r3 @ jump to virtual address ENDPROC(cpu_resume_turn_mmu_on) cpu_resume_after_mmu: str r5, [r2, r4, lsl #2] @ restore old mapping -#ifdef MULTI_CACHE - ldr r10, =cpu_cache - ldr pc, [r10, #CACHE_FLUSH_KERN_ALL] -#else - b __cpuc_flush_kern_all -#endif + mcr p15, 0, r0, c1, c0, 0 @ turn on D-cache + mov pc, lr /* * Note: Yes, part of the following code is located into the .data section.