[2/3] OMAP2+: powerdomain: fix bank power state bitfields

Message ID	20110308021550.31946.31935.stgit@twilight.localdomain (mailing list archive)
State	Awaiting Upstream, archived
Delegated to:	Paul Walmsley
Headers	show Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p282HP1j011296 for <patchwork-omap@patchwork.kernel.org>; Tue, 8 Mar 2011 02:17:26 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755762Ab1CHCRY (ORCPT <rfc822;patchwork-omap@patchwork.kernel.org>); Mon, 7 Mar 2011 21:17:24 -0500 Received: from utopia.booyaka.com ([72.9.107.138]:33949 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755269Ab1CHCRU (ORCPT <rfc822; linux-omap@vger.kernel.org>); Mon, 7 Mar 2011 21:17:20 -0500 Received: (qmail 9286 invoked by uid 1019); 8 Mar 2011 02:17:19 -0000 MBOX-Line: From nobody Mon Mar 7 19:15:51 2011 Subject: [PATCH 2/3] OMAP2+: powerdomain: fix bank power state bitfields To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org From: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>, Santosh Shilimkar <santosh.shilimkar@ti.com>, =?utf-8?q?Beno=C3=AEt?= Cousson <b-cousson@ti.com> Date: Mon, 07 Mar 2011 19:15:51 -0700 Message-ID: <20110308021550.31946.31935.stgit@twilight.localdomain> In-Reply-To: <20110308021018.31946.29962.stgit@twilight.localdomain> References: <20110308021018.31946.29962.stgit@twilight.localdomain> User-Agent: StGit/0.15 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: <linux-omap.vger.kernel.org> X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 08 Mar 2011 02:17:26 +0000 (UTC)

diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c index 96cda13..4210c33 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c @@ -62,13 +62,13 @@ struct powerdomain gfx_omap2_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430ES1), .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index 78739e1..cc389fb 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -2,7 +2,7 @@ * OMAP2XXX powerdomain definitions * * Copyright (C) 2007-2008 Texas Instruments, Inc. - * Copyright (C) 2007-2010 Nokia Corporation + * Copyright (C) 2007-2011 Nokia Corporation * * Paul Walmsley, Jouni Högander * @@ -30,13 +30,13 @@ static struct powerdomain dsp_pwrdm = { .prcm_offs = OMAP24XX_DSP_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, + [0] = PWRSTS_RET, }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, + [0] = PWRSTS_ON, }, }; @@ -48,10 +48,10 @@ static struct powerdomain mpu_24xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, + [0] = PWRSTS_RET, }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, + [0] = PWRSTS_ON, }, }; @@ -87,13 +87,13 @@ static struct powerdomain mdm_pwrdm = { .prcm_offs = OMAP2430_MDM_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index e1bec56..9c9c113 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -2,7 +2,7 @@ * OMAP3 powerdomain definitions * * Copyright (C) 2007-2008 Texas Instruments, Inc. - * Copyright (C) 2007-2010 Nokia Corporation + * Copyright (C) 2007-2011 Nokia Corporation * * Paul Walmsley, Jouni Högander * @@ -47,10 +47,10 @@ static struct powerdomain iva2_pwrdm = { [3] = PWRSTS_OFF_RET, }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, - [1] = PWRDM_POWER_ON, + [0] = PWRSTS_ON, + [1] = PWRSTS_ON, [2] = PWRSTS_OFF_ON, - [3] = PWRDM_POWER_ON, + [3] = PWRSTS_ON, }, }; @@ -128,13 +128,13 @@ static struct powerdomain dss_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .prcm_offs = OMAP3430_DSS_MOD, .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; @@ -149,13 +149,13 @@ static struct powerdomain sgx_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), /* XXX This is accurate for 3430 SGX, but what about GFX? */ .pwrsts = PWRSTS_OFF_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; @@ -164,13 +164,13 @@ static struct powerdomain cam_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .prcm_offs = OMAP3430_CAM_MOD, .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; @@ -182,10 +182,10 @@ static struct powerdomain per_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; @@ -200,7 +200,7 @@ static struct powerdomain neon_pwrdm = { .prcm_offs = OMAP3430_NEON_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, }; static struct powerdomain usbhost_pwrdm = { @@ -208,7 +208,7 @@ static struct powerdomain usbhost_pwrdm = { .prcm_offs = OMAP3430ES2_USBHOST_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRDM_POWER_RET, + .pwrsts_logic_ret = PWRSTS_RET, /* * REVISIT: Enabling usb host save and restore mechanism seems to * leave the usb host domain permanently in ACTIVE mode after @@ -218,10 +218,10 @@ static struct powerdomain usbhost_pwrdm = { /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */ .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + [0] = PWRSTS_RET, /* MEMRETSTATE */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + [0] = PWRSTS_ON, /* MEMONSTATE */ }, }; diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 226e01a..c4222c7 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -2,7 +2,7 @@ * OMAP4 Power domains framework * * Copyright (C) 2009-2010 Texas Instruments, Inc. - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) @@ -40,18 +40,18 @@ static struct powerdomain core_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 5, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* core_nret_bank */ + [0] = PWRSTS_OFF, /* core_nret_bank */ [1] = PWRSTS_OFF_RET, /* core_ocmram */ - [2] = PWRDM_POWER_RET, /* core_other_bank */ + [2] = PWRSTS_RET, /* core_other_bank */ [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ [4] = PWRSTS_OFF_RET, /* ducati_unicache */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* core_nret_bank */ + [0] = PWRSTS_ON, /* core_nret_bank */ [1] = PWRSTS_OFF_RET, /* core_ocmram */ - [2] = PWRDM_POWER_ON, /* core_other_bank */ - [3] = PWRDM_POWER_ON, /* ducati_l2ram */ - [4] = PWRDM_POWER_ON, /* ducati_unicache */ + [2] = PWRSTS_ON, /* core_other_bank */ + [3] = PWRSTS_ON, /* ducati_l2ram */ + [4] = PWRSTS_ON, /* ducati_unicache */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -65,10 +65,10 @@ static struct powerdomain gfx_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* gfx_mem */ + [0] = PWRSTS_OFF, /* gfx_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* gfx_mem */ + [0] = PWRSTS_ON, /* gfx_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -83,12 +83,12 @@ static struct powerdomain abe_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 2, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* aessmem */ - [1] = PWRDM_POWER_OFF, /* periphmem */ + [0] = PWRSTS_RET, /* aessmem */ + [1] = PWRSTS_OFF, /* periphmem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* aessmem */ - [1] = PWRDM_POWER_ON, /* periphmem */ + [0] = PWRSTS_ON, /* aessmem */ + [1] = PWRSTS_ON, /* periphmem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -103,10 +103,10 @@ static struct powerdomain dss_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* dss_mem */ + [0] = PWRSTS_OFF, /* dss_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* dss_mem */ + [0] = PWRSTS_ON, /* dss_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -121,14 +121,14 @@ static struct powerdomain tesla_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* tesla_edma */ + [0] = PWRSTS_RET, /* tesla_edma */ [1] = PWRSTS_OFF_RET, /* tesla_l1 */ [2] = PWRSTS_OFF_RET, /* tesla_l2 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* tesla_edma */ - [1] = PWRDM_POWER_ON, /* tesla_l1 */ - [2] = PWRDM_POWER_ON, /* tesla_l2 */ + [0] = PWRSTS_ON, /* tesla_edma */ + [1] = PWRSTS_ON, /* tesla_l1 */ + [2] = PWRSTS_ON, /* tesla_l2 */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -142,10 +142,10 @@ static struct powerdomain wkup_44xx_pwrdm = { .pwrsts = PWRSTS_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* wkup_bank */ + [0] = PWRSTS_OFF, /* wkup_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* wkup_bank */ + [0] = PWRSTS_ON, /* wkup_bank */ }, }; @@ -162,7 +162,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cpu0_l1 */ + [0] = PWRSTS_ON, /* cpu0_l1 */ }, }; @@ -179,7 +179,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cpu1_l1 */ + [0] = PWRSTS_ON, /* cpu1_l1 */ }, }; @@ -192,10 +192,10 @@ static struct powerdomain emu_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* emu_bank */ + [0] = PWRSTS_OFF, /* emu_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* emu_bank */ + [0] = PWRSTS_ON, /* emu_bank */ }, }; @@ -211,12 +211,12 @@ static struct powerdomain mpu_44xx_pwrdm = { .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* mpu_l1 */ [1] = PWRSTS_OFF_RET, /* mpu_l2 */ - [2] = PWRDM_POWER_RET, /* mpu_ram */ + [2] = PWRSTS_RET, /* mpu_ram */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* mpu_l1 */ - [1] = PWRDM_POWER_ON, /* mpu_l2 */ - [2] = PWRDM_POWER_ON, /* mpu_ram */ + [0] = PWRSTS_ON, /* mpu_l1 */ + [1] = PWRSTS_ON, /* mpu_l2 */ + [2] = PWRSTS_ON, /* mpu_ram */ }, }; @@ -230,16 +230,16 @@ static struct powerdomain ivahd_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 4, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* hwa_mem */ + [0] = PWRSTS_OFF, /* hwa_mem */ [1] = PWRSTS_OFF_RET, /* sl2_mem */ [2] = PWRSTS_OFF_RET, /* tcm1_mem */ [3] = PWRSTS_OFF_RET, /* tcm2_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* hwa_mem */ - [1] = PWRDM_POWER_ON, /* sl2_mem */ - [2] = PWRDM_POWER_ON, /* tcm1_mem */ - [3] = PWRDM_POWER_ON, /* tcm2_mem */ + [0] = PWRSTS_ON, /* hwa_mem */ + [1] = PWRSTS_ON, /* sl2_mem */ + [2] = PWRSTS_ON, /* tcm1_mem */ + [3] = PWRSTS_ON, /* tcm2_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -253,10 +253,10 @@ static struct powerdomain cam_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* cam_mem */ + [0] = PWRSTS_OFF, /* cam_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cam_mem */ + [0] = PWRSTS_ON, /* cam_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -271,10 +271,10 @@ static struct powerdomain l3init_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* l3init_bank1 */ + [0] = PWRSTS_OFF, /* l3init_bank1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* l3init_bank1 */ + [0] = PWRSTS_ON, /* l3init_bank1 */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -289,12 +289,12 @@ static struct powerdomain l4per_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* nonretained_bank */ - [1] = PWRDM_POWER_RET, /* retained_bank */ + [0] = PWRSTS_OFF, /* nonretained_bank */ + [1] = PWRSTS_RET, /* retained_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* nonretained_bank */ - [1] = PWRDM_POWER_ON, /* retained_bank */ + [0] = PWRSTS_ON, /* nonretained_bank */ + [1] = PWRSTS_ON, /* retained_bank */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, };

[2/3] OMAP2+: powerdomain: fix bank power state bitfields

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