From patchwork Mon Apr 24 22:56:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Rivshin X-Patchwork-Id: 9697343 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2E610603F3 for ; Mon, 24 Apr 2017 23:06:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1E59026212 for ; Mon, 24 Apr 2017 23:06:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11A7328415; Mon, 24 Apr 2017 23:06:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29C9926212 for ; Mon, 24 Apr 2017 23:06:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1174550AbdDXXGd (ORCPT ); Mon, 24 Apr 2017 19:06:33 -0400 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:49567 "EHLO out4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1171997AbdDXXGE (ORCPT ); Mon, 24 Apr 2017 19:06:04 -0400 X-Greylist: delayed 356 seconds by postgrey-1.27 at vger.kernel.org; Mon, 24 Apr 2017 19:06:02 EDT Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 8750420C07; Mon, 24 Apr 2017 19:00:05 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute7.internal (MEProxy); Mon, 24 Apr 2017 19:00:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=awxrd.com; h=cc :date:from:message-id:subject:to:x-me-sender:x-me-sender :x-sasl-enc:x-sasl-enc; s=fm1; bh=mqkk1JOKKorHL46vAKABgmeNGUDNhK Y/XOCkY7NuP4s=; b=Ftn3JoiEeX4tCBHKNan0qFY8Cs2RswfA8FTvg5mwptsJHS Cj8qzbdF922wwk/cDX4SxwGJfeVcXglzyFE1h5Ec1UIWyWfZNuSGjwow/jiyR83o OPiU/h7GWNMZe2G6Uj18dV0kFVTvx/267n8MhbZFUjK61hMzhT7Ez/9RjwtHIhuv f9mb/vko1R0FtkR6bc7kHhyXmnC1S4vPyS7fkef+S9DQo3Iu/na9T8e7ZAIQeK5j hAtA42/cGg6I5mG5Rlb3QV1/0+UJMA/rwjyXrwziPyJPWMPLbAYfd3uNBwcAuKsj ZSsdxUuNuh6rnA0tzeufijgsYCqjalrT9gyZMG8Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:message-id:subject:to :x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=mqkk1J OKKorHL46vAKABgmeNGUDNhKY/XOCkY7NuP4s=; b=DXSjArkUteuR/aSXANWsbb oFzFTrkxBzTm28e0clqwZoJTkoud+OYhMRiReCZ+vQnNLx1RA0KuJKcpwQPHYUvd NDa2yLOIDLSE3Lt2CyjrGcrq2J7N/GKC0lmqD+kcZ8iNW2PQTd2xn+i3xV36PMim 6B4qdE3R5czpHdwe6hXMVsKROX0sQADEL5Qertl0D0kuSHcZ4wCasB6K2LAz+0rT mJvRK0LQUVLtfhW/7WIAjneKA5sGMNFipGZJ97aKEpuWzo4IImho59nJC5UyDOVW pQvmSuxiOVx8PMen/BJDA2QAaDGTiaSGXvxZ1llMOF82zNARL7wrnZV5XEu4ZvdQ == X-ME-Sender: X-Sasl-enc: u65ncCy8BC9tRpqEnFYf12bAaxblzemkQR7dBwVOdtbd 1493074805 Received: from drivshin-linux.crosskeys.inscitek.com (unknown [24.213.148.66]) by mail.messagingengine.com (Postfix) with ESMTPA id 102F97E783; Mon, 24 Apr 2017 19:00:05 -0400 (EDT) From: David Rivshin To: linux-gpio@vger.kernel.org, linux-omap@vger.kernel.org, Grygorii Strashko Cc: drivshin@awxrd.com, Santosh Shilimkar , Kevin Hilman , Linus Walleij , Alexandre Courbot , linux-arm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v2] gpio: omap: return error if requested debounce time is not possible Date: Mon, 24 Apr 2017 18:56:50 -0400 Message-Id: <20170424225650.17566-1-drivshin@awxrd.com> X-Mailer: git-send-email 2.9.3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: David Rivshin omap_gpio_debounce() does not validate that the requested debounce is within a range it can handle. Instead it lets the register value wrap silently, and always returns success. This can lead to all sorts of unexpected behavior, such as gpio_keys asking for a too-long debounce, but getting a very short debounce in practice. Fix this by returning -EINVAL if the requested value does not fit into the register field. If there is no debounce clock available at all, return -ENOTSUPP. Fixes: e85ec6c3047b ("gpio: omap: fix omap2_set_gpio_debounce") Cc: # 4.3+ Signed-off-by: David Rivshin Acked-by: Grygorii Strashko --- Changes since v1 (https://lkml.org/lkml/2017/3/16/1094): - Added dev_info() in omap_gpio_debounce() on error. drivers/gpio/gpio-omap.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index efc85a2..fd9bce9 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -208,9 +208,11 @@ static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) * OMAP's debounce time is in 31us steps * = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 * so we need to convert and round up to the closest unit. + * + * Return: 0 on success, negative error otherwise. */ -static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, - unsigned debounce) +static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, + unsigned debounce) { void __iomem *reg; u32 val; @@ -218,11 +220,12 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, bool enable = !!debounce; if (!bank->dbck_flag) - return; + return -ENOTSUPP; if (enable) { debounce = DIV_ROUND_UP(debounce, 31) - 1; - debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK; + if ((debounce & OMAP4_GPIO_DEBOUNCINGTIME_MASK) != debounce) + return -EINVAL; } l = BIT(offset); @@ -255,6 +258,8 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, bank->context.debounce = debounce; bank->context.debounce_en = val; } + + return 0; } /** @@ -964,14 +969,20 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, { struct gpio_bank *bank; unsigned long flags; + int ret; bank = gpiochip_get_data(chip); raw_spin_lock_irqsave(&bank->lock, flags); - omap2_set_gpio_debounce(bank, offset, debounce); + ret = omap2_set_gpio_debounce(bank, offset, debounce); raw_spin_unlock_irqrestore(&bank->lock, flags); - return 0; + if (ret) + dev_info(chip->parent, + "Could not set line %u debounce to %u microseconds (%d)", + offset, debounce, ret); + + return ret; } static int omap_gpio_set_config(struct gpio_chip *chip, unsigned offset,