From patchwork Fri May 19 08:15:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 9736375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9711C601C2 for ; Fri, 19 May 2017 08:27:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70794286E6 for ; Fri, 19 May 2017 08:27:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 654ED28875; Fri, 19 May 2017 08:27:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21DF8286E6 for ; Fri, 19 May 2017 08:27:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755088AbdESISr (ORCPT ); Fri, 19 May 2017 04:18:47 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:10408 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752560AbdESISn (ORCPT ); Fri, 19 May 2017 04:18:43 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4J8HqXu018305; Fri, 19 May 2017 03:17:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1495181872; bh=rXXLF97hS0A8vSXSJtQlSooowsBmb4vU+Ig0JmWhttE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jIynunJkT3oaAKO0HPh9mWd/s1m/OkzT/p6yaO+GMHm0DHayrHVBA3hi5nBCYCnqY cZjhK4a2rRl5mxu7OGsi7bx5cx7FEZchaZPmIpaZpXGS+jKght2bl2ZrkSscdq1seL UtKgXVXeRV/kiMM3eES2Ms4eNPspEOsjs5RjeNmo= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8HqPE015769; Fri, 19 May 2017 03:17:52 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Fri, 19 May 2017 03:17:51 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8FfQZ009185; Fri, 19 May 2017 03:17:48 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren CC: , , , , , , Jonathan Corbet , Mark Rutland , Russell King , , Subject: [PATCH 28/41] ARM: dts: am571x-idk: Add pinmux configuration for MMC Date: Fri, 19 May 2017 13:45:28 +0530 Message-ID: <20170519081541.26753-29-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170519081541.26753-1-kishon@ti.com> References: <20170519081541.26753-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for dra72 SoC and use it in the pinctrl properties of MMC devicetree nodes present in am571x-idk.dts. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am571x-idk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index e685c8e811b0..875291d1bdd7 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -11,6 +11,7 @@ #include #include #include "am57xx-idk-common.dtsi" +#include "dra72x-mmc-iodelay.dtsi" / { model = "TI AM5718 IDK"; @@ -72,3 +73,21 @@ id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>; vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>; }; + +&mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_sdr12>; + pinctrl-3 = <&mmc1_pins_sdr25>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; +}; + +&mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; +};