new file mode 100644
@@ -0,0 +1,33 @@
+Texas Instruments Audio Engine Subsystem (AESS) binding
+
+AESS performs real-time signal processing on TI SoCs.
+
+
+Required properties:
+
+compatible: Shall be one of the following:
+ "ti,omap4-aess"
+
+reg: Shall contain the device instance IO range
+
+interrupts: Shall contain the device instance interrupt
+
+
+Optional properties:
+
+reg-names: Shall contain the IO range names if multiple IO
+ ranges are used by the SoC
+
+ti,hwmods: Shall contain the TI interconnect module name if needed
+ by the SoC
+
+
+Example:
+
+ aess: aess@401f1000 {
+ compatible = "ti,omap4-aess";
+ reg = <0x401f1000 0x400>, /* MPU private access */
+ <0x490f1000 0x400>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ ti,hwmods = "aess";
+ };
@@ -768,6 +768,14 @@
ti,hwmods = "slimbus1";
};
+ aess: aess@401f1000 {
+ compatible = "ti,omap4-aess";
+ reg = <0x401f1000 0x400>, /* MPU private access */
+ <0x490f1000 0x400>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ ti,hwmods = "aess";
+ };
+
mcbsp4: mcbsp@48096000 {
compatible = "ti,omap4-mcbsp";
reg = <0x48096000 0xff>; /* L4 Interconnect */
On omap4 we're missing the aess node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- .../devicetree/bindings/sound/ti-aess.txt | 33 ++++++++++++++++++++++ arch/arm/boot/dts/omap4.dtsi | 8 ++++++ 2 files changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti-aess.txt