From patchwork Wed Aug 30 20:25:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 9930737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3BBA86022E for ; Wed, 30 Aug 2017 20:25:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B6BA2879D for ; Wed, 30 Aug 2017 20:25:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1FF0528740; Wed, 30 Aug 2017 20:25:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29389287A9 for ; Wed, 30 Aug 2017 20:25:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751463AbdH3UZY convert rfc822-to-8bit (ORCPT ); Wed, 30 Aug 2017 16:25:24 -0400 Received: from muru.com ([72.249.23.125]:38962 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751016AbdH3UZY (ORCPT ); Wed, 30 Aug 2017 16:25:24 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 31EA782B9; Wed, 30 Aug 2017 20:25:45 +0000 (UTC) Date: Wed, 30 Aug 2017 13:25:20 -0700 From: Tony Lindgren To: Sebastian Reichel Cc: linux-omap@vger.kernel.org, =?utf-8?Q?Beno=C3=AEt?= Cousson , devicetree@vger.kernel.org, Mark Rutland , Rob Herring Subject: Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4 Message-ID: <20170830202519.GI6008@atomide.com> References: <20170830151953.30856-1-tony@atomide.com> <20170830151953.30856-9-tony@atomide.com> <20170830193745.ygotb3nuyfmdlaaf@earth> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170830193745.ygotb3nuyfmdlaaf@earth> User-Agent: Mutt/1.8.3 (2017-05-23) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP * Sebastian Reichel [170830 12:38]: > On Wed, Aug 30, 2017 at 08:19:44AM -0700, Tony Lindgren wrote: > Maybe change the leading text: > > OMAP3's Synchronous Serial Interface (SSI) controller implements a > legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI), > while the controller found inside OMAP4 is supposed to be fully compliant > with the HSI standard. OK > > Required properties: > > -- compatible: Should include "ti,omap3-ssi". > > +- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi" > > - reg-names: Contains the values "sys" and "gdd" (in this order). > > - reg: Contains a matching register specifier for each entry > > in reg-names. > > @@ -27,6 +27,7 @@ Each port is represented as a sub-node of the ti,omap3-ssi device. > > Required Port sub-node properties: > > - compatible: Should be set to the following value > > ti,omap3-ssi-port (applicable to OMAP34xx devices) > > + ti,omap4-ssi-port (applicable to OMAP44xx devices) > ^^^ > > this should be hsi. Oops fixed. > otherwise: > > Reviewed-by: Sebastian Reichel Thanks, updated patch below. Regards, Tony 8< -------------------- From tony Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:07:51 -0700 Subject: [PATCH] ARM: dts: Add missing hsi node for omap4 On omap4 we're missing the hsi node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Let's also update the binding accrodingly while at it. Cc: Mark Rutland Cc: Rob Herring Reviewed-by: Sebastian Reichel Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/hsi/omap-ssi.txt | 13 +++++++-- arch/arm/boot/dts/omap4.dtsi | 34 ++++++++++++++++++++++ 2 files changed, 44 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/hsi/omap-ssi.txt b/Documentation/devicetree/bindings/hsi/omap-ssi.txt --- a/Documentation/devicetree/bindings/hsi/omap-ssi.txt +++ b/Documentation/devicetree/bindings/hsi/omap-ssi.txt @@ -1,10 +1,12 @@ OMAP SSI controller bindings -OMAP Synchronous Serial Interface (SSI) controller implements a legacy -variant of MIPI's High Speed Synchronous Serial Interface (HSI). +OMAP3's Synchronous Serial Interface (SSI) controller implements a +legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI), +while the controller found inside OMAP4 is supposed to be fully compliant +with the HSI standard. Required properties: -- compatible: Should include "ti,omap3-ssi". +- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi" - reg-names: Contains the values "sys" and "gdd" (in this order). - reg: Contains a matching register specifier for each entry in reg-names. @@ -27,6 +29,7 @@ Each port is represented as a sub-node of the ti,omap3-ssi device. Required Port sub-node properties: - compatible: Should be set to the following value ti,omap3-ssi-port (applicable to OMAP34xx devices) + ti,omap4-hsi-port (applicable to OMAP44xx devices) - reg-names: Contains the values "tx" and "rx" (in this order). - reg: Contains a matching register specifier for each entry in reg-names. @@ -38,6 +41,10 @@ Required Port sub-node properties: property. If it's missing the port will not be enabled. +Optional properties: +- ti,hwmods: Shall contain TI interconnect module name if needed + by the SoC + Example for Nokia N900: ssi-controller@48058000 { diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -632,6 +632,40 @@ dma-names = "tx", "rx"; }; + hsi: hsi@4a058000 { + compatible = "ti,omap4-hsi"; + reg = <0x4a058000 0x4000>, + <0x4a05c000 0x1000>; + reg-names = "sys", "gdd"; + ti,hwmods = "hsi"; + + clocks = <&hsi_fck>; + clock-names = "hsi_fck"; + + interrupts = ; + interrupt-names = "gdd_mpu"; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a058000 0x4000>; + + hsi_port1: hsi-port@2000 { + compatible = "ti,omap4-hsi-port"; + reg = <0x2000 0x800>, + <0x2800 0x800>; + reg-names = "tx", "rx"; + interrupts = ; + }; + + hsi_port2: hsi-port@3000 { + compatible = "ti,omap4-hsi-port"; + reg = <0x3000 0x800>, + <0x3800 0x800>; + reg-names = "tx", "rx"; + interrupts = ; + }; + }; + mmu_dsp: mmu@4a066000 { compatible = "ti,omap4-iommu"; reg = <0x4a066000 0x100>;