From patchwork Thu Dec 14 13:09:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 10112037 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BF51160327 for ; Thu, 14 Dec 2017 13:12:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE7BE29C75 for ; Thu, 14 Dec 2017 13:12:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AC2DF29C5A; Thu, 14 Dec 2017 13:12:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A581A29C83 for ; Thu, 14 Dec 2017 13:12:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752243AbdLNNLY (ORCPT ); Thu, 14 Dec 2017 08:11:24 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:33517 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752572AbdLNNLU (ORCPT ); Thu, 14 Dec 2017 08:11:20 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDAbZs013249; Thu, 14 Dec 2017 07:10:37 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513257037; bh=AUBy2BztH9lbp4BL82Nll0utHCryvAAFs2E29KQXzuk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vD3SlnB+4VzCV+XcqObJBqn+4XI4e8JDmiDLbKv5P1cfjTgIkr604Qioz+lzcOfnt NWiZNldvx6XqngN4C4nrXTAAe/1FrMQ8V7e9/JvWAEfSrKnw/pjRp0hzEEt552lAs7 mhMeLF4IxHeJV3V6fjbFtmZ/Vl8FX9/5/IufB7Cc= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDAbmS014315; Thu, 14 Dec 2017 07:10:37 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:10:37 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:10:37 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBED9wdV032017; Thu, 14 Dec 2017 07:10:33 -0600 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , Adrian Hunter CC: Mark Rutland , Russell King , , , , , , , Subject: [RFC PATCH 09/12] mmc: sdhci: Use software timer when timeout greater than hardware capablility Date: Thu, 14 Dec 2017 18:39:38 +0530 Message-ID: <20171214130941.26666-10-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214130941.26666-1-kishon@ti.com> References: <20171214130941.26666-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Errata i834 in AM572x Sitara Processors Silicon Revision 2.0, 1.1 (SPRZ429K July 2014–Revised March 2017 [1]) mentions Under high speed HS200 and SDR104 modes, the functional clock for MMC modules will reach up to 192 MHz. At this frequency, the maximum obtainable timeout (DTO = 0xE) through MMC host controller is (1/192MHz)*2^27 = 700ms. Commands taking longer than 700ms may be affected by this small window frame. Workaround for this errata is use a software timer instead of hardware timer to provide the delay requested by the upper layer. While this errata is specific to AM572x, it is applicable to all sdhci based controllers when a particular request require timeout greater than hardware capability. Re-use the software timer already implemented in sdhci to program the correct timeout value and also disable the hardware timeout when the required timeout is greater than hardware capabiltiy in order to avoid spurious timeout interrupts. This patch is based on the earlier patch implemented for omap_hsmmc [2] [1] -> http://www.ti.com/lit/er/sprz429k/sprz429k.pdf [2] -> https://patchwork.kernel.org/patch/9791449/ Signed-off-by: Kishon Vijay Abraham I --- drivers/mmc/host/sdhci.c | 41 +++++++++++++++++++++++++++++++++++++++-- drivers/mmc/host/sdhci.h | 11 +++++++++++ 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index e9290a3439d5..d0655e1d2cc7 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -673,6 +673,27 @@ static void sdhci_adma_table_post(struct sdhci_host *host, } } +static void sdhci_calc_sw_timeout(struct sdhci_host *host, + struct mmc_command *cmd, + unsigned int target_timeout) +{ + struct mmc_host *mmc = host->mmc; + struct mmc_ios *ios = &mmc->ios; + struct mmc_data *data = cmd->data; + unsigned long long transfer_time; + + if (data) { + transfer_time = MMC_BLOCK_TRANSFER_TIME_MS(data->blksz, + ios->bus_width, + ios->clock); + /* calculate timeout for the entire data */ + host->data_timeout = (data->blocks * (target_timeout + + transfer_time)); + } else if (cmd->flags & MMC_RSP_BUSY) { + host->data_timeout = cmd->busy_timeout * MSEC_PER_SEC; + } +} + static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) { u8 count; @@ -732,8 +753,12 @@ static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) } if (count >= 0xF) { - DBG("Too large timeout 0x%x requested for CMD%d!\n", - count, cmd->opcode); + DBG("Too large timeout.. using SW timeout for CMD%d!\n", + cmd->opcode); + sdhci_calc_sw_timeout(host, cmd, target_timeout); + host->ier &= ~SDHCI_INT_DATA_TIMEOUT; + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); + sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); count = 0xE; } @@ -1198,6 +1223,14 @@ static void sdhci_finish_command(struct sdhci_host *host) { struct mmc_command *cmd = host->cmd; + if (host->data_timeout) { + unsigned long timeout; + + timeout = jiffies + + msecs_to_jiffies(host->data_timeout); + sdhci_mod_timer(host, host->cmd->mrq, timeout); + } + host->cmd = NULL; if (cmd->flags & MMC_RSP_PRESENT) { @@ -2341,6 +2374,10 @@ static bool sdhci_request_done(struct sdhci_host *host) return true; } + host->data_timeout = 0; + host->ier |= SDHCI_INT_DATA_TIMEOUT; + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); + sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); sdhci_del_timer(host, mrq); /* diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 54bc444c317f..e6e0278bea1a 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -332,6 +332,15 @@ struct sdhci_adma2_64_desc { /* Allow for a a command request and a data request at the same time */ #define SDHCI_MAX_MRQS 2 +/* + * Time taken for transferring one block. It is multiplied by a constant + * factor '2' to account for any errors + */ +#define MMC_BLOCK_TRANSFER_TIME_MS(blksz, bus_width, freq) \ + ((unsigned long long) \ + (2 * (((blksz) * MSEC_PER_SEC * \ + (8 / (bus_width))) / (freq)))) + enum sdhci_cookie { COOKIE_UNMAPPED, COOKIE_PRE_MAPPED, /* mapped by sdhci_pre_req() */ @@ -546,6 +555,8 @@ struct sdhci_host { /* Host SDMA buffer boundary. */ u32 sdma_boundary; + unsigned long long data_timeout; + unsigned long private[0] ____cacheline_aligned; };