From patchwork Fri Feb 9 12:04:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10208867 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9AF8660236 for ; Fri, 9 Feb 2018 12:04:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C04D29743 for ; Fri, 9 Feb 2018 12:04:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E0E0297C8; Fri, 9 Feb 2018 12:04:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC74029743 for ; Fri, 9 Feb 2018 12:04:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751201AbeBIMED (ORCPT ); Fri, 9 Feb 2018 07:04:03 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:9006 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750909AbeBIMEB (ORCPT ); Fri, 9 Feb 2018 07:04:01 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w19C3lnR000643; Fri, 9 Feb 2018 06:03:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518177827; bh=RBrYTS9YGnBdRSSMd+jnTDLaSuyff54NliM936ur/6Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aZDp3Xvr0M922YBKsz5dIUHgmAXNaUb7Dcvc4/dZeThG5UcHtEqSJ0pg4um9dRwzv aXr/EHN/SrFXJ2wjYxanFJiaVZ6Q4Nd+1apo+32gdoT7pgC8T7twPrZtZWIUWo1ZLN zJ2oCs9lmrAcn2DK76mj4EJ2bUDsa3AzEFIFGFiY= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3lRK023523; Fri, 9 Feb 2018 06:03:47 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 9 Feb 2018 06:03:46 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 9 Feb 2018 06:03:47 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3bkq017802; Fri, 9 Feb 2018 06:03:44 -0600 From: Vignesh R To: Lorenzo Pieralisi , Jingoo Han , Joao Pinto CC: Kishon Vijay Abraham I , Bjorn Helgaas , Niklas Cassel , , , , Vignesh R Subject: [PATCH 2/3] PCI: dwc: pci-dra7xx: Improve MSI IRQ handling Date: Fri, 9 Feb 2018 17:34:14 +0530 Message-ID: <20180209120415.17590-3-vigneshr@ti.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180209120415.17590-1-vigneshr@ti.com> References: <20180209120415.17590-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need to ensure that there are no pending MSI IRQ vector set (i.e PCIE_MSI_INTR0_STATUS reads 0 at least once) before exiting dra7xx_pcie_msi_irq_handler(). Else, the dra7xx PCIe wrapper will not register new MSI IRQs even though PCIE_MSI_INTR0_STATUS shows IRQs are pending. Therefore, keep calling dra7xx_pcie_msi_irq_handler() until it returns IRQ_NONE, which suggests that PCIE_MSI_INTR0_STATUS is 0. This fixes a bug, where PCIe wifi cards with 4 DMA queues like Intel 8260 used to throw following error and stall during ping/iperf3 tests. [ 97.776310] iwlwifi 0000:01:00.0: Queue 9 stuck for 2500 ms. Signed-off-by: Vignesh R --- drivers/pci/dwc/pci-dra7xx.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index ed8558d638e5..3420cbf7b60a 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -254,14 +254,31 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) struct dra7xx_pcie *dra7xx = arg; struct dw_pcie *pci = dra7xx->pci; struct pcie_port *pp = &pci->pp; + int count = 0; unsigned long reg; u32 virq, bit; reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); + dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg); switch (reg) { case MSI: - dw_handle_msi_irq(pp); + /* + * Need to make sure no MSI IRQs are pending before + * exiting handler, else the wrapper will not catch new + * IRQs. So loop around till dw_handle_msi_irq() returns + * IRQ_NONE + */ + while (dw_handle_msi_irq(pp) != IRQ_NONE && count < 1000) + count++; + + if (count == 1000) { + dev_err(pci->dev, "too much work in msi irq\n"); + dra7xx_pcie_writel(dra7xx, + PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, + reg); + return IRQ_HANDLED; + } break; case INTA: case INTB: @@ -275,8 +292,6 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) break; } - dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg); - return IRQ_HANDLED; }