From patchwork Thu Jul 5 14:23:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 10509469 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6BEA6600F5 for ; Thu, 5 Jul 2018 14:22:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5972528DE8 for ; Thu, 5 Jul 2018 14:22:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4A5892910E; Thu, 5 Jul 2018 14:22:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E3EE228DE8 for ; Thu, 5 Jul 2018 14:22:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753789AbeGEOWW (ORCPT ); Thu, 5 Jul 2018 10:22:22 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:39706 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754060AbeGEOWN (ORCPT ); Thu, 5 Jul 2018 10:22:13 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w65ELlCC089922; Thu, 5 Jul 2018 09:21:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530800507; bh=tmVgVNsYrnik95T+UDRp7GvOZ8LMOe7Zz9+Ew/gWXvw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iiJJ1oYaKcqg30dHL6ajiCV8S7AxtcCCobhdwXrt+C8Y5inSsLyu1D0UBZ7FFouzG ctQzbrafOt9mwIl0/rgKLBA6iy/TiHq14gaBE9oAJhW3DIlcqTP2oJwsN0OUNBsdK6 W5JJGd/lyxVmLHQD9hB9HrSOcUqvZB4Cv7yYxSUc= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w65ELlvh019736; Thu, 5 Jul 2018 09:21:47 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 5 Jul 2018 09:21:47 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 5 Jul 2018 09:21:47 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w65ELPxk020259; Thu, 5 Jul 2018 09:21:44 -0500 From: Faiz Abbas To: , , , , CC: , , , , , , Subject: [PATCH v4 5/6] ARM: dts: Add generic interconnect target module node for MCAN Date: Thu, 5 Jul 2018 19:53:18 +0530 Message-ID: <20180705142319.19583-6-faiz_abbas@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180705142319.19583-1-faiz_abbas@ti.com> References: <20180705142319.19583-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ti-sysc driver provides support for manipulating the idle modes and interconnect level resets. Add the generic interconnect target module node for MCAN to support the same. CC: Tony Lindgren Signed-off-by: Faiz Abbas --- arch/arm/boot/dts/dra76x.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index bfc82636999c..5157cc431574 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -11,6 +11,24 @@ / { compatible = "ti,dra762", "ti,dra7"; + ocp { + target-module@42c01900 { + compatible = "ti,sysc-dra7-mcan", "ti,sysc"; + ranges = <0x0 0x42c00000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x42c01900 0x4>, + <0x42c01904 0x4>, + <0x42c01908 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | + SYSC_DRA7_MCAN_ENAWAKEUP)>; + ti,syss-mask = <1>; + clocks = <&wkupaon_clkctrl DRA7_ADC_CLKCTRL 0>; + clock-names = "fck"; + }; + }; + }; /* MCAN interrupts are hard-wired to irqs 67, 68 */