diff mbox series

[V2,04/15] ARM: exynos: cleanup cppcheck shifting error

Message ID 20190624135105.15579-5-tranmanphong@gmail.com (mailing list archive)
State New, archived
Headers show
Series cleanup cppcheck signed shifting errors | expand

Commit Message

Phong Tran June 24, 2019, 1:50 p.m. UTC
[arch/arm/mach-exynos/suspend.c:288]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour

Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
 arch/arm/mach-exynos/suspend.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Russell King (Oracle) June 24, 2019, 1:58 p.m. UTC | #1
On Mon, Jun 24, 2019 at 08:50:54PM +0700, Phong Tran wrote:
> [arch/arm/mach-exynos/suspend.c:288]: (error) Shifting signed 32-bit
> value by 31 bits is undefined behaviour
> 
> Signed-off-by: Phong Tran <tranmanphong@gmail.com>
> ---
>  arch/arm/mach-exynos/suspend.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
> index be122af0de8f..b6a73dc5bde4 100644
> --- a/arch/arm/mach-exynos/suspend.c
> +++ b/arch/arm/mach-exynos/suspend.c
> @@ -285,7 +285,7 @@ static void exynos_pm_set_wakeup_mask(void)
>  	 * Set wake-up mask registers
>  	 * EXYNOS_EINT_WAKEUP_MASK is set by pinctrl driver in late suspend.
>  	 */
> -	pmu_raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
> +	pmu_raw_writel(exynos_irqwake_intmask & ~(BIT(31)), S5P_WAKEUP_MASK);

Parens around BIT() are no longer required.

>  }
>  
>  static void exynos_pm_enter_sleep_mode(void)
> -- 
> 2.11.0
> 
>
diff mbox series

Patch

diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index be122af0de8f..b6a73dc5bde4 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -285,7 +285,7 @@  static void exynos_pm_set_wakeup_mask(void)
 	 * Set wake-up mask registers
 	 * EXYNOS_EINT_WAKEUP_MASK is set by pinctrl driver in late suspend.
 	 */
-	pmu_raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
+	pmu_raw_writel(exynos_irqwake_intmask & ~(BIT(31)), S5P_WAKEUP_MASK);
 }
 
 static void exynos_pm_enter_sleep_mode(void)