| Message ID | 20190924171543.345-1-tony@atomide.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: OMAP2+: Add missing LCDC midlemode for am335x | expand |
On 24/09/19 10:45 PM, Tony Lindgren wrote: > TRM "Table 13-34. SYSCONFIG Register Field Descriptions" lists both > standbymode and idlemode that should be just the sidle and midle > registers where midle is currently unconfigured for lcdc_sysc. As > the dts data has been generated based on lcdc_sysc, we now have an > empty "ti,sysc-midle" property. > > And so we currently get a warning for lcdc because of a difference > with dts provided configuration compared to the legacy platform > data. This is because lcdc has SYSC_HAS_MIDLEMODE configured in > the platform data without configuring the modes. > > Let's fix the issue by adding the missing midlemode to lcdc_sysc, > and configuring the "ti,sysc-midle" property based on the TRM > values. Tested for DS0 and rtc+ddr modes on am43 and ds0 on am33. Tested-by: Keerthy <j-keerthy@ti.com> > > Fixes: f711c575cfec ("ARM: dts: am335x: Add l4 interconnect hierarchy and ti-sysc data") > Cc: Jyri Sarha <jsarha@ti.com> > Cc: Keerthy <j-keerthy@ti.com> > Cc: Robert Nelson <robertcnelson@gmail.com> > Cc: Suman Anna <s-anna@ti.com> > Signed-off-by: Tony Lindgren <tony@atomide.com> > --- > arch/arm/boot/dts/am33xx-l4.dtsi | 4 +++- > arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 5 +++-- > 2 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi > --- a/arch/arm/boot/dts/am33xx-l4.dtsi > +++ b/arch/arm/boot/dts/am33xx-l4.dtsi > @@ -2038,7 +2038,9 @@ > reg = <0xe000 0x4>, > <0xe054 0x4>; > reg-names = "rev", "sysc"; > - ti,sysc-midle ; > + ti,sysc-midle = <SYSC_IDLE_FORCE>, > + <SYSC_IDLE_NO>, > + <SYSC_IDLE_SMART>; > ti,sysc-sidle = <SYSC_IDLE_FORCE>, > <SYSC_IDLE_NO>, > <SYSC_IDLE_SMART>; > diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c > --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c > +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c > @@ -231,8 +231,9 @@ static struct omap_hwmod am33xx_control_hwmod = { > static struct omap_hwmod_class_sysconfig lcdc_sysc = { > .rev_offs = 0x0, > .sysc_offs = 0x54, > - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), > - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > + .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE, > + .idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART, > .sysc_fields = &omap_hwmod_sysc_type2, > }; > >
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -2038,7 +2038,9 @@ reg = <0xe000 0x4>, <0xe054 0x4>; reg-names = "rev", "sysc"; - ti,sysc-midle ; + ti,sysc-midle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; ti,sysc-sidle = <SYSC_IDLE_FORCE>, <SYSC_IDLE_NO>, <SYSC_IDLE_SMART>; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -231,8 +231,9 @@ static struct omap_hwmod am33xx_control_hwmod = { static struct omap_hwmod_class_sysconfig lcdc_sysc = { .rev_offs = 0x0, .sysc_offs = 0x54, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE, + .idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART, .sysc_fields = &omap_hwmod_sysc_type2, };
TRM "Table 13-34. SYSCONFIG Register Field Descriptions" lists both standbymode and idlemode that should be just the sidle and midle registers where midle is currently unconfigured for lcdc_sysc. As the dts data has been generated based on lcdc_sysc, we now have an empty "ti,sysc-midle" property. And so we currently get a warning for lcdc because of a difference with dts provided configuration compared to the legacy platform data. This is because lcdc has SYSC_HAS_MIDLEMODE configured in the platform data without configuring the modes. Let's fix the issue by adding the missing midlemode to lcdc_sysc, and configuring the "ti,sysc-midle" property based on the TRM values. Fixes: f711c575cfec ("ARM: dts: am335x: Add l4 interconnect hierarchy and ti-sysc data") Cc: Jyri Sarha <jsarha@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/boot/dts/am33xx-l4.dtsi | 4 +++- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 5 +++-- 2 files changed, 6 insertions(+), 3 deletions(-)