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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id a17sm287708ilf.22.2019.09.25.10.14.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Sep 2019 10:14:55 -0700 (PDT) From: Adam Ford To: linux-omap@vger.kernel.org Cc: adam.ford@logicpd.com, Adam Ford Subject: [PATCH] ARM: dts: omap3.dtsi: Fix AES and SHA Engines Date: Wed, 25 Sep 2019 12:14:44 -0500 Message-Id: <20190925171444.9904-1-aford173@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AES and SHA engines for the OMAP3 are currently not functional. When the stopped working is unknown, but we have a regression. This patch uses the ti,sysc-omap2 to address the issue and enables to the AES and SHA engines on the DM3730 and OMAP3530 to work once again. Signed-off-by: Adam Ford diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 4043ecb38016..5123dc80b694 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -156,13 +156,28 @@ }; }; - aes: aes@480c5000 { - compatible = "ti,omap3-aes"; - ti,hwmods = "aes"; - reg = <0x480c5000 0x50>; - interrupts = <0>; - dmas = <&sdma 65 &sdma 66>; - dma-names = "tx", "rx"; + aes_target: target-module@480c5000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x480c5044 0x4>, + <0x480c5048 0x4>, + <0x480c504c 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + ; + ti,syss-mask = <1>; + clocks = <&aes2_ick>; + clock-names = "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480c5000 0x2000>; + aes: aes@0 { + compatible = "ti,omap3-aes"; + reg = <0 0x50>; + interrupts = <0>; + dmas = <&sdma 65 &sdma 66>; + dma-names = "tx", "rx"; + }; }; prm: prm@48306000 { @@ -579,13 +594,28 @@ status = "disabled"; }; - sham: sham@480c3000 { - compatible = "ti,omap3-sham"; - ti,hwmods = "sham"; - reg = <0x480c3000 0x64>; - interrupts = <49>; - dmas = <&sdma 69>; - dma-names = "rx"; + sham_target: target-module@480c3000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x480c3056 0x4>, + <0x480c3060 0x4>, + <0x480c3064 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + ; + ti,syss-mask = <1>; + clocks = <&sha12_ick>; + clock-names = "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480c3000 0x2000>; + sham: sham@0 { + compatible = "ti,omap3-sham"; + reg = <0 0x64>; + interrupts = <49>; + dmas = <&sdma 69>; + dma-names = "rx"; + }; }; timer1: timer@48318000 {