From patchwork Mon Nov 30 09:39:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 11940025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B03DEC5519F for ; Mon, 30 Nov 2020 09:42:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F99A206ED for ; Mon, 30 Nov 2020 09:42:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Wv3J4MpO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727534AbgK3Jl4 (ORCPT ); Mon, 30 Nov 2020 04:41:56 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:46520 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727146AbgK3Jl4 (ORCPT ); Mon, 30 Nov 2020 04:41:56 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AU9eDRB037147; Mon, 30 Nov 2020 03:40:13 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1606729213; bh=PqDRr/7VPYcHII8tDeyh8slU+NbS/EkhmXcXLitOnVw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Wv3J4MpOywrAq//IYK5Kmu78SXhiSVw1YCCePCStoFqizZNSxx37FBC72bQ/Zi2Oq 8MLT6qKG9Oof0nkpv+ghjPPkcA4n2F5vIMnQAHBgpPo51W09S8J9vGGafCZHQqG3Mj C5QTK/jCTXH5KtQ9knA+TSeOPEVqBKxZ9M+eZ3jk= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AU9eD4m001291 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 30 Nov 2020 03:40:13 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 30 Nov 2020 03:40:12 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 30 Nov 2020 03:40:12 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AU9eAIj041208; Mon, 30 Nov 2020 03:40:10 -0600 From: Tomi Valkeinen To: Sebastian Reichel , Laurent Pinchart , Nikhil Devshatwar , , CC: Sekhar Nori , Tony Lindgren , , Tomi Valkeinen Subject: [PATCH v4 81/80] drm/omap: dsi: allow DSI commands to be sent early Date: Mon, 30 Nov 2020 11:39:52 +0200 Message-ID: <20201130093952.133326-1-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201124124538.660710-1-tomi.valkeinen@ti.com> References: <20201124124538.660710-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Panel drivers can send DSI commands in panel's prepare(), which happens before the bridge's enable() is called. The OMAP DSI driver currently only sets up the DSI interface at bridge's enable(), so prepare() cannot be used to send DSI commands. This patch fixes the issue by making it possible to enable the DSI interface any time a command is about to be sent. Disabling the interface is be done via delayed work. Signed-off-by: Tomi Valkeinen --- One more patch. With this video mode panels seem to work cleanly (tested by me on omap5 uevm + custom panel and Nikolaus on pyra). drivers/gpu/drm/omapdrm/dss/dsi.c | 49 +++++++++++++++++++++++++++---- drivers/gpu/drm/omapdrm/dss/dsi.h | 3 ++ 2 files changed, 47 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index d52bef0c7aa2..ae504ab122b4 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -3498,6 +3498,9 @@ static void dsi_enable(struct dsi_data *dsi) WARN_ON(!dsi_bus_is_locked(dsi)); + if (WARN_ON(dsi->iface_enabled)) + return; + mutex_lock(&dsi->lock); r = dsi_runtime_get(dsi); @@ -3510,6 +3513,8 @@ static void dsi_enable(struct dsi_data *dsi) if (r) goto err_init_dsi; + dsi->iface_enabled = true; + mutex_unlock(&dsi->lock); return; @@ -3525,6 +3530,9 @@ static void dsi_disable(struct dsi_data *dsi) { WARN_ON(!dsi_bus_is_locked(dsi)); + if (WARN_ON(!dsi->iface_enabled)) + return; + mutex_lock(&dsi->lock); dsi_sync_vc(dsi, 0); @@ -3536,6 +3544,8 @@ static void dsi_disable(struct dsi_data *dsi) dsi_runtime_put(dsi); + dsi->iface_enabled = false; + mutex_unlock(&dsi->lock); } @@ -4224,10 +4234,12 @@ static ssize_t omap_dsi_host_transfer(struct mipi_dsi_host *host, dsi_bus_lock(dsi); - if (dsi->video_enabled) - r = _omap_dsi_host_transfer(dsi, vc, msg); - else - r = -EIO; + if (!dsi->iface_enabled) { + dsi_enable(dsi); + schedule_delayed_work(&dsi->dsi_disable_work, msecs_to_jiffies(2000)); + } + + r = _omap_dsi_host_transfer(dsi, vc, msg); dsi_bus_unlock(dsi); @@ -4392,6 +4404,14 @@ static int omap_dsi_host_detach(struct mipi_dsi_host *host, if (WARN_ON(dsi->dsidev != client)) return -EINVAL; + cancel_delayed_work_sync(&dsi->dsi_disable_work); + + if (dsi->iface_enabled) { + dsi_bus_lock(dsi); + dsi_disable(dsi); + dsi_bus_unlock(dsi); + } + omap_dsi_unregister_te_irq(dsi); dsi->dsidev = NULL; return 0; @@ -4627,9 +4647,12 @@ static void dsi_bridge_enable(struct drm_bridge *bridge) struct dsi_data *dsi = drm_bridge_to_dsi(bridge); struct omap_dss_device *dssdev = &dsi->output; + cancel_delayed_work_sync(&dsi->dsi_disable_work); + dsi_bus_lock(dsi); - dsi_enable(dsi); + if (!dsi->iface_enabled) + dsi_enable(dsi); dsi_enable_video_output(dssdev, VC_VIDEO); @@ -4643,6 +4666,8 @@ static void dsi_bridge_disable(struct drm_bridge *bridge) struct dsi_data *dsi = drm_bridge_to_dsi(bridge); struct omap_dss_device *dssdev = &dsi->output; + cancel_delayed_work_sync(&dsi->dsi_disable_work); + dsi_bus_lock(dsi); dsi->video_enabled = false; @@ -4835,6 +4860,18 @@ static const struct soc_device_attribute dsi_soc_devices[] = { { /* sentinel */ } }; +static void omap_dsi_disable_work_callback(struct work_struct *work) +{ + struct dsi_data *dsi = container_of(work, struct dsi_data, dsi_disable_work.work); + + dsi_bus_lock(dsi); + + if (dsi->iface_enabled && !dsi->video_enabled) + dsi_disable(dsi); + + dsi_bus_unlock(dsi); +} + static int dsi_probe(struct platform_device *pdev) { const struct soc_device_attribute *soc; @@ -4868,6 +4905,8 @@ static int dsi_probe(struct platform_device *pdev) INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, dsi_framedone_timeout_work_callback); + INIT_DEFERRABLE_WORK(&dsi->dsi_disable_work, omap_dsi_disable_work_callback); + #ifdef DSI_CATCH_MISSING_TE timer_setup(&dsi->te_timer, dsi_te_timeout, 0); #endif diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.h b/drivers/gpu/drm/omapdrm/dss/dsi.h index 452cee3279db..805f9073d9a5 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.h +++ b/drivers/gpu/drm/omapdrm/dss/dsi.h @@ -391,6 +391,7 @@ struct dsi_data { atomic_t do_ext_te_update; bool te_enabled; + bool iface_enabled; bool video_enabled; struct delayed_work framedone_timeout_work; @@ -440,6 +441,8 @@ struct dsi_data { struct omap_dss_device output; struct drm_bridge bridge; + + struct delayed_work dsi_disable_work; }; struct dsi_packet_sent_handler_data {