| Message ID | 20240109171950.31010-3-afd@ti.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Device tree support for Imagination Series5 GPU | expand |
On 09/01/2024 18:19, Andrew Davis wrote: > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from > multiple vendors. Describe how the SGX GPU is integrated in these SoC, > including register space and interrupts. Clocks, reset, and power domain > information is SoC specific. > > Signed-off-by: Andrew Davis <afd@ti.com> > Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> > + clock-names: > + minItems: 1 > + items: > + - const: core > + - const: mem > + - const: sys There are no devices currently using third clock, but I assume it is expected or possible. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
* Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [240109 19:53]: > On 09/01/2024 18:19, Andrew Davis wrote: > > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from > > multiple vendors. Describe how the SGX GPU is integrated in these SoC, > > including register space and interrupts. Clocks, reset, and power domain > > information is SoC specific. > > > > Signed-off-by: Andrew Davis <afd@ti.com> > > Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> > > > > + clock-names: > > + minItems: 1 > > + items: > > + - const: core > > + - const: mem > > + - const: sys > > There are no devices currently using third clock, but I assume it is > expected or possible. I think the third clock is typically merged with one of the two clocks but yeah possibly it's a separate clocke in some cases. > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Looks good to me too. So for merging these, as many of the changes touch the omap variants, I could set up an immutable branch with all the changes after -rc1. Or I can ack the patches too if somebody has better ideas. Regards, Tony
On Wed, Jan 10, 2024 at 10:38:57AM +0200, Tony Lindgren wrote: > * Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [240109 19:53]: > > On 09/01/2024 18:19, Andrew Davis wrote: > > > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from > > > multiple vendors. Describe how the SGX GPU is integrated in these SoC, > > > including register space and interrupts. Clocks, reset, and power domain > > > information is SoC specific. > > > > > > Signed-off-by: Andrew Davis <afd@ti.com> > > > Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> > > > > > > > + clock-names: > > > + minItems: 1 > > > + items: > > > + - const: core > > > + - const: mem > > > + - const: sys > > > > There are no devices currently using third clock, but I assume it is > > expected or possible. > > I think the third clock is typically merged with one of the two clocks but > yeah possibly it's a separate clocke in some cases. > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Looks good to me too. > > So for merging these, as many of the changes touch the omap variants, I > could set up an immutable branch with all the changes after -rc1. Or I can > ack the patches too if somebody has better ideas. Just take all but patches 10 and 11. I don't think it matters if the binding is there for them as long as it is all there in next. No one is paying that close attention to the warnings I think. Rob
* Rob Herring <robh@kernel.org> [240119 17:48]: > On Wed, Jan 10, 2024 at 10:38:57AM +0200, Tony Lindgren wrote: > > So for merging these, as many of the changes touch the omap variants, I > > could set up an immutable branch with all the changes after -rc1. Or I can > > ack the patches too if somebody has better ideas. > > Just take all but patches 10 and 11. I don't think it matters if the > binding is there for them as long as it is all there in next. No one is > paying that close attention to the warnings I think. OK I've now applied these except patches 10 and 11 into a sgx-for-v6.9 branch [0]. Regards, Tony [0] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=sgx-for-v6.9
diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml new file mode 100644 index 0000000000000..f5898b04381cb --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2023 Imagination Technologies Ltd. +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/img,powervr-sgx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Imagination Technologies PowerVR SGX GPUs + +maintainers: + - Frank Binns <frank.binns@imgtec.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - ti,omap3430-gpu # Rev 121 + - ti,omap3630-gpu # Rev 125 + - const: img,powervr-sgx530 + - items: + - enum: + - ingenic,jz4780-gpu # Rev 130 + - ti,omap4430-gpu # Rev 120 + - const: img,powervr-sgx540 + - items: + - enum: + - allwinner,sun6i-a31-gpu # MP2 Rev 115 + - ti,omap4470-gpu # MP1 Rev 112 + - ti,omap5432-gpu # MP2 Rev 105 + - ti,am5728-gpu # MP2 Rev 116 + - ti,am6548-gpu # MP1 Rev 117 + - const: img,powervr-sgx544 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + items: + - const: core + - const: mem + - const: sys + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +allOf: + - if: + properties: + compatible: + contains: + const: ti,am6548-gpu + then: + required: + - power-domains + else: + properties: + power-domains: false + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun6i-a31-gpu + - ingenic,jz4780-gpu + then: + required: + - clocks + - clock-names + else: + properties: + clocks: false + clock-names: false + - if: + properties: + compatible: + contains: + const: allwinner,sun6i-a31-gpu + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + - if: + properties: + compatible: + contains: + const: ingenic,jz4780-gpu + then: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/soc/ti,sci_pm_domain.h> + + gpu@7000000 { + compatible = "ti,am6548-gpu", "img,powervr-sgx544"; + reg = <0x7000000 0x10000>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>; + }; + + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu: gpu@1c40000 { + compatible = "allwinner,sun6i-a31-gpu", "img,powervr-sgx544"; + reg = <0x01c40000 0x10000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu 1>, <&ccu 2>; + clock-names = "core", "mem"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 2a4e8d2c69c40..b8b3aab5dd490 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10469,6 +10469,7 @@ M: Matt Coster <matt.coster@imgtec.com> S: Supported T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +F: Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml F: Documentation/gpu/imagination/ F: drivers/gpu/drm/imagination/ F: include/uapi/drm/pvr_drm.h