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DSPBRIDGE: change offset of RSTCTRL and RSTST register to the correct value.

Message ID 496565EC904933469F292DDA3F1663E60297E9F2D9@dlee06.ent.ti.com (mailing list archive)
State Not Applicable, archived
Headers show

Commit Message

Guzman Lugo, Fernando June 18, 2009, 1:33 a.m. UTC 
From 35acd0141fdaeb9a7b3214de34442a4948275ffb Mon Sep 17 00:00:00 2001
From: Fernando Guzman Lugo <x0095840@ti.com>
Date: Mon, 15 Jun 2009 16:14:23 -0500
Subject: [PATCH] DSPBRIDGE: change offset of RSTCTRL and RSTST register to the correct value.

This patch changes the defines of the offset for RM_RSTCTRL_IVA2 and
RM_RSTCTRL_IVA2 to the value according with the TRM.

Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com>
---
 drivers/dsp/bridge/hw/PRCMAccInt.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/dsp/bridge/hw/PRCMAccInt.h b/drivers/dsp/bridge/hw/PRCMAccInt.h
index 42baa68..5a11f01 100644
--- a/drivers/dsp/bridge/hw/PRCMAccInt.h
+++ b/drivers/dsp/bridge/hw/PRCMAccInt.h
@@ -117,8 +117,8 @@ 
 #define PRCM_CM_AUTOIDLE_DSP_OFFSET          (u32)(0x830)
 #define PRCM_CM_CLKSEL_DSP_OFFSET            (u32)(0x840)
 #define PRCM_CM_CLKSTCTRL_DSP_OFFSET         (u32)(0x848)
-#define PRCM_RM_RSTCTRL_DSP_OFFSET           (u32)(0x850)
-#define PRCM_RM_RSTST_DSP_OFFSET             (u32)(0x858)
+#define PRCM_RM_RSTCTRL_DSP_OFFSET           (u32)(0x050)
+#define PRCM_RM_RSTST_DSP_OFFSET             (u32)(0x058)
 #define PRCM_PM_PWSTCTRL_DSP_OFFSET          (u32)(0x8e0)
 #define PRCM_PM_PWSTST_DSP_OFFSET            (u32)(0x8e4)
 #define PRCM_PM_PWSTST_IVA2_OFFSET            (u32)(0xE4)