Message ID | 51DACDA2.1060806@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 07/08/2013 05:33 PM, Ruchika Kharwar wrote: > > On 07/08/2013 02:28 AM, Felipe Balbi wrote: >> On Fri, Jun 21, 2013 at 10:46:10AM -0500, Ruchika Kharwar wrote: >>> Addition of the M and N recommended values for the USB3 PHY DPLL. >>> Sysclk for DRA7xx is 20MHz. >>> This yields: >>> Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz >>> >>> Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> >>> Signed-off-by: Ruchika Kharwar <ruchika@ti.com> >> this won't apply since you had already sent me another version. Please >> send in a fix up patch if that's wrong. >> > I already did .. :-) > Sent 07/04/2013 FYI, I've just sent a better version to fix the root of the problem, i.e. use lookup table instead of index based lookup. That should avoid such problems in the future. cheers, -roger -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/usb/phy/phy-omap-usb3.c b/drivers/usb/phy/phy-omap-usb3.c index efe6e14..a2fb30b 100644 --- a/drivers/usb/phy/phy-omap-usb3.c +++ b/drivers/usb/phy/phy-omap-usb3.c @@ -71,9 +71,9 @@ static struct usb_dpll_params omap_usb3_dpll_params[NUM_SYS_CLKS] = { {1250, 5, 4, 20, 0}, /* 12 MHz */ {3125, 20, 4, 20, 0}, /* 16.8 MHz */ {1172, 8, 4, 20, 65537}, /* 19.2 MHz */ + {1000, 7, 4, 10, 0}, /* 20 MHz */ {1250, 12, 4, 20, 0}, /* 26 MHz */ {3125, 47, 4, 20, 92843}, /* 38.4 MHz */ - {1000, 7, 4, 10, 0}, /* 20 MHz */ };