From patchwork Thu Oct 31 09:10:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3119731 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E209EBF924 for ; Thu, 31 Oct 2013 09:11:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7123E2039A for ; Thu, 31 Oct 2013 09:11:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9057B2026C for ; Thu, 31 Oct 2013 09:11:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751457Ab3JaJL0 (ORCPT ); Thu, 31 Oct 2013 05:11:26 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:51360 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750712Ab3JaJLY (ORCPT ); Thu, 31 Oct 2013 05:11:24 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9V9AoEp027495; Thu, 31 Oct 2013 04:10:50 -0500 Received: from DLEE71.ent.ti.com ([157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9V9AnF0006810; Thu, 31 Oct 2013 04:10:49 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 31 Oct 2013 04:10:49 -0500 Received: from [172.24.78.22] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9V9AkQi000656; Thu, 31 Oct 2013 04:10:46 -0500 Message-ID: <52721E95.4080806@ti.com> Date: Thu, 31 Oct 2013 11:10:45 +0200 From: Tero Kristo User-Agent: Mozilla/5.0 (X11; Linux i686; rv:24.0) Gecko/20100101 Thunderbird/24.0 MIME-Version: 1.0 To: Nishanth Menon , , , , , , CC: , Subject: Re: [PATCHv9 00/43] ARM: TI SoC clock DT conversion References: <1382716658-6964-1-git-send-email-t-kristo@ti.com> <526FDFF4.9030806@ti.com> <5270C1F3.6000409@ti.com> <52711F12.1090008@ti.com> <52716799.6040002@ti.com> In-Reply-To: <52716799.6040002@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 10/30/2013 10:10 PM, Nishanth Menon wrote: > On 10/30/2013 10:00 AM, Nishanth Menon wrote: >> On 10/30/2013 03:23 AM, Tero Kristo wrote: >>> On 10/29/2013 06:19 PM, Nishanth Menon wrote: >>>> On 10/25/2013 10:56 AM, Tero Kristo wrote: >>>> >>>>> Testing done: >>>>> - omap3-beagle: boot + suspend/resume (ret + off) >>>>> - omap4-panda-es: boot + suspend/resume >>>>> - omap5-uevm: boot >>>>> - dra7-evm: boot >>>>> - am335x-bone: boot >>>>> >>>>> Test branches available: >>>>> >>>>> tree: https://github.com/t-kristo/linux-pm.git >>>> >>>> >>>>> Fully functioning test branch: 3.12-rc6-dt-clks-v9 >>>>> >>>> ^^ I tested this branch (boot testing): >>>> Beagle-XM: http://pastebin.com/50A1qtFq (crashes + clkdm issues, dpll5 >>>> failed to transition) >>> >>> I just sent you a private email with a patch to try out, should fix the >>> boot crash at least hopefully. Basically I forgot to convert one part of >>> the kernel to the new regmap stuff for omap36xx. >> >> it does bootup yes. >>> >>> clkdm issues are caused by wrong data in omap_hwmod_3xxx_data.c, USB >>> nodes are listing l3_init_clkdm for them, but this only exists on >>> omap4+. Seems like some copy paste bug introduced by someone. >>> >>> dpll5 part I am not too sure, can you check if the same happens with >>> non-dt boot? >> >> no-dt: http://pastebin.com/bYP9fTzH >> dt: http://pastebin.com/xHup4L9Y >> >> dpll5 warning seems to be only in dt-boot? >> > > Tracked this down: you were missing the following - looks like the > conversion script might be missing converting the flags clock data > over to dts? > > diff --git > a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi > b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi > index 7e37e3e..c9b77c8 100644 > --- a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi > +++ b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi > @@ -30,6 +30,7 @@ > compatible = "ti,omap3-dpll-clock"; > clocks = <&sys_ck>, <&sys_ck>; > reg = <0x0d04>, <0x0d24>, <0x0d34>, <0x0d4c>; > + ti,low-power-stop; > }; > > dpll5_m2_ck: dpll5_m2_ck { > > > Yea, seems I introduced the problem with the conversion script changes. The valid fix for this is actually at the end of this mail (this fixes both of the problems introduced, and also completes the fix you did), I will add the fixes to the next rev. Question to Mike/Paul/Tony/Benoit, shall I resend the complete series or only the two patches that will be changed? ---- --- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi index 7e37e3e..08db6d8 100644 --- a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi +++ b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi @@ -30,6 +30,8 @@ compatible = "ti,omap3-dpll-clock"; clocks = <&sys_ck>, <&sys_ck>; reg = <0x0d04>, <0x0d24>, <0x0d34>, <0x0d4c>; + ti,low-power-stop; + ti,lock; }; dpll5_m2_ck: dpll5_m2_ck { diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi index 417bb03..e834b1c 100644 --- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi +++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi @@ -335,8 +335,6 @@ cm: cm@48004000 { compatible = "ti,omap3-dpll-clock"; clocks = <&sys_ck>, <&dpll1_fck>; reg = <0x0904>, <0x0924>, <0x0934>, <0x0940>; - ti,lock; - ti,low-power-bypass; }; dpll1_x2_ck: dpll1_x2_ck {