From patchwork Tue Dec 16 11:35:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 5500331 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 41A529F1D4 for ; Tue, 16 Dec 2014 11:37:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C6FD20A22 for ; Tue, 16 Dec 2014 11:37:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E965420A1E for ; Tue, 16 Dec 2014 11:36:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751157AbaLPLg6 (ORCPT ); Tue, 16 Dec 2014 06:36:58 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:43945 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751022AbaLPLg4 (ORCPT ); Tue, 16 Dec 2014 06:36:56 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id sBGBaUZN005254; Tue, 16 Dec 2014 05:36:30 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id sBGBaU4K027163; Tue, 16 Dec 2014 05:36:30 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Tue, 16 Dec 2014 05:36:30 -0600 Received: from [172.24.145.214] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id sBGBaRGO010089; Tue, 16 Dec 2014 05:36:28 -0600 Message-ID: <549018EC.8020207@ti.com> Date: Tue, 16 Dec 2014 17:05:08 +0530 From: Lokesh Vutla User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Lennart Sorensen , , , , "Kristo, Tero" , Nishanth Menon , Sekhar Nori Subject: Re: [PATCH 2/2] ARM: omap5/dra7xx: Fix counter frequency drift for AM572x errata i856. References: <358281a880ccd89873efeea75edaa6c953eac2bd.1418421100.git.lsorense@csclub.uwaterloo.ca> <20141214044517.GD24110@csclub.uwaterloo.ca> In-Reply-To: <20141214044517.GD24110@csclub.uwaterloo.ca> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Lennart, On Sunday 14 December 2014 10:15 AM, Lennart Sorensen wrote: > On Fri, Dec 12, 2014 at 05:08:56PM -0500, Lennart Sorensen wrote: >> Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external >> crystal is not enabled at power up. Instead the CPU falls back to using >> an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually >> 20MHz on boards so far (which gives an emulated frequency of 32.786KHz), >> but can also be 19.2 or 27MHz which result in much larger drift. >> >> Since this is used to drive the master counter at 32.768KHz * 375 / >> 2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43 >> seconds per day, and more than the 500ppm NTP is able to tolerate. >> >> Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU >> is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and >> by known that the real counter frequency can be determined and used. > s/known/knowing/ > and a comma after that. >> The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244. Is this applicable for OMAP5 also? If not can you drop omap5 from $subject? In order to make the code more simpler, can you use the following logic: and add documentation accordingly. diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index a3c0133..a80ac2d 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -286,6 +286,10 @@ #define OMAP5XXX_CONTROL_STATUS 0x134 #define OMAP5_DEVICETYPE_MASK (0x7 << 6) +/* DRA7XX CONTROL CORE BOOTSTRAP */ +#define DRA7_CTRL_CORE_BOOTSTRAP 0x6c4 +#define DRA7_SPEEDSELECT_MASK (0x3 << 8) + /* * REVISIT: This list of registers is not comprehensive - there are more * that should be added. diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index fb0cb2b..84aadae 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -54,6 +54,7 @@ #include "soc.h" #include "common.h" +#include "control.h" #include "powerdomain.h" #include "omap-secure.h" @@ -545,6 +546,16 @@ static void __init realtime_counter_init(void) break; } + if (soc_is_dra7xx()) { + reg = omap_ctrl_readl(DRA7_CTRL_CORE_BOOTSTRAP); + reg = reg & DRA7_SPEEDSELECT_MASK; + + if (reg) { + num = 75; + den = 244; + } + } + /* Program numerator and denumerator registers */ reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) & NUMERATOR_DENUMERATOR_MASK;