===================================================================
@@ -411,7 +411,7 @@
if (retries_cnt > 10) {
pr_info("Loop count exceeded in check SR I2C"
"write\n");
- return SR_FAIL;
+ return 1;
}
if (loop_cnt > 50) {
retries_cnt++;
@@ -421,7 +421,7 @@
vc_bypass_value = prm_read_mod_reg(OMAP3430_GR_MOD,
OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
}
- return SR_PASS;
+ return 0;
}
static int sr_enable(struct omap_sr *sr, u32 target_opp_no)
@@ -476,7 +476,7 @@
if (nvalue_reciprocal == 0) {
pr_notice("OPP%d doesn't support SmartReflex\n",
target_opp_no);
- return SR_FALSE;
+ return false;
}
sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
@@ -526,7 +526,7 @@
/* SRCONFIG - enable SR */
sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
- return SR_TRUE;
+ return true;
}
static void sr_disable(struct omap_sr *sr)
@@ -591,11 +591,11 @@
sr->is_autocomp_active = 0;
/* Reset the volatage for current OPP */
sr_reset_voltage(srid);
- return SR_TRUE;
+ return true;
} else {
pr_warning("SR%d: VDD autocomp is not active\n",
srid);
- return SR_FALSE;
+ return false;
}
}
@@ -711,7 +711,7 @@
if (retries_cnt > 10) {
pr_info("Loop count exceeded in check SR I2C"
"write\n");
- return SR_FAIL;
+ return 1;
}
if (loop_cnt > 50) {
retries_cnt++;
@@ -731,7 +731,7 @@
sr_start_vddautocomap(SR2, target_opp_no);
}
- return SR_PASS;
+ return 0;
}
/* Sysfs interface to select SR VDD1 auto compensation */