From patchwork Mon Apr 1 10:30:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 2370171 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 6BA72DFB7B for ; Mon, 1 Apr 2013 10:30:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757532Ab3DAKaa (ORCPT ); Mon, 1 Apr 2013 06:30:30 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:57931 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757526Ab3DAKaa convert rfc822-to-8bit (ORCPT ); Mon, 1 Apr 2013 06:30:30 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r31AUKac004878; Mon, 1 Apr 2013 05:30:21 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r31AUFYT027296; Mon, 1 Apr 2013 16:00:15 +0530 (IST) Received: from DBDE01.ent.ti.com ([fe80::d5df:c4b5:9919:4e10]) by DBDE70.ent.ti.com ([fe80::2141:513f:409:315a%21]) with mapi id 14.01.0323.003; Mon, 1 Apr 2013 16:00:15 +0530 From: "Hiremath, Vaibhav" To: "mturquette@linaro.org" , Paul Walmsley , Tony Lindgren , "Nayak, Rajendra" CC: "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "khilman@deeprootsystems.com" Subject: Query regarding clk framework - from .set_rate api Thread-Topic: Query regarding clk framework - from .set_rate api Thread-Index: Ac4uw+SsBxshDc2sQ1aZuxUzyD/1uQ== Date: Mon, 1 Apr 2013 10:30:13 +0000 Message-ID: <79CD15C6BA57404B839C016229A409A83EC3E7C3@DBDE01.ent.ti.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.133.105] MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi Rajendra/Paul/Mike, I am debugging the issue reported by Michal on AM33xx clock tree In the context of LCDC driver functionality- http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg36102.html Where, the clk_set_rate() seems to be not working, and that's true with the current implementation of OMAP/AM33xx clock tree, as the CLK_SET_RATE_PARENT flag is not set to any of the clock nodes. Please note that I am using DEFINE_STRUCT_CLK() macro for defining clocks And which doesn't allow you to specify the flags. Below is the propagation scenario under discussion: DISP_DPLL (dpll_disp_ck) ->> dpll_disp_m2_ck ->> lcd_clk_mux_sel ->> lcd_gclk Just to make sure that propagation works fine, I hacked the code and tested it on AM335x BeagleBone platform without any issues. Can I create a patch modifying DEFINE_STRUCT_CLK() macro to take Another argument '.flags" and change all clock-trees accrordingly?? Diff Starts here: Thanks, Vaibhav --- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html ===================== diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 7baede1..51fc78b 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -11,6 +11,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include #include #include #include @@ -100,6 +101,7 @@ exit: static void __init omap_generic_init(void) { struct device_node *np; + struct clk *clk; omap_sdrc_init(NULL, NULL); @@ -115,6 +117,15 @@ static void __init omap_generic_init(void) if (of_machine_is_compatible("ti,omap5")) omap_sata_init(); + + clk = clk_get(NULL, "lcd_gclk"); + if (IS_ERR(clk)) + printk("Can not get lcd_gclk clock\n"); + + printk("%s:%d gclk_rate - %lu\n", __func__, __LINE__, clk_get_rate(clk)); + clk_set_rate(clk, 300000000); + printk("%s:%d clk_rate - %lu\n", __func__, __LINE__, clk_get_rate(clk)); + clk_put(clk); } #ifdef CONFIG_SOC_OMAP2420 diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index e674e01..d4552db 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -284,7 +284,7 @@ DEFINE_STRUCT_CLK(dpll_disp_ck, dpll_core_ck_parents, dpll_ddr_ck_ops); * TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2 * and ALT_CLK1/2) */ -DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, "dpll_disp_ck", &dpll_disp_ck, 0x0, +DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, "dpll_disp_ck", &dpll_disp_ck, CLK_SET_RATE_PARENT, AM33XX_CM_DIV_M2_DPLL_DISP, AM33XX_DPLL_CLKOUT_DIV_SHIFT, AM33XX_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 836311f..3830e5b 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -64,6 +64,7 @@ struct clockdomain; .parent_names = _parent_array_name, \ .num_parents = ARRAY_SIZE(_parent_array_name), \ .ops = &_clkops_name, \ + .flags = CLK_SET_RATE_PARENT, \ }; #define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \