diff mbox

[PATCHv2,4/9] ARM: OMAP5: hwmod data: Add spinlock data

Message ID 9812d9a19f9a52021dcae4b4fef50f10f2c21202.1379445653.git.s-anna@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Suman Anna Sept. 17, 2013, 7:31 p.m. UTC
Add the hwmod data for the spinlock IP in OMAP5 SoC.
This is needed to be able to enable the OMAP spinlock
support for OMAP5.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 44 ++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

Comments

Paul Walmsley Oct. 9, 2013, 7:12 a.m. UTC | #1
On Tue, 17 Sep 2013, Suman Anna wrote:

> Add the hwmod data for the spinlock IP in OMAP5 SoC.
> This is needed to be able to enable the OMAP spinlock
> support for OMAP5.
> 
> Signed-off-by: Suman Anna <s-anna@ti.com>

Thanks, queued.  You can omit this one from future reposts of this series.



- Paul
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Suman Anna Oct. 9, 2013, 5:49 p.m. UTC | #2
On 10/09/2013 02:12 AM, Paul Walmsley wrote:
> On Tue, 17 Sep 2013, Suman Anna wrote:
> 
>> Add the hwmod data for the spinlock IP in OMAP5 SoC.
>> This is needed to be able to enable the OMAP spinlock
>> support for OMAP5.
>>
>> Signed-off-by: Suman Anna <s-anna@ti.com>
> 
> Thanks, queued.  You can omit this one from future reposts of this series.
> 

Thanks. I will be reposting the series (soon), and will omit this patch
and the AM335 sysc patch in the repost.

regards
Suman

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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index cde4155..84712e4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1146,6 +1146,41 @@  static struct omap_hwmod omap54xx_mpu_hwmod = {
 };
 
 /*
+ * 'spinlock' class
+ * spinlock provides hardware assistance for synchronizing the processes
+ * running on multiple processors
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_spinlock_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.syss_offs	= 0x0014,
+	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap54xx_spinlock_hwmod_class = {
+	.name	= "spinlock",
+	.sysc	= &omap54xx_spinlock_sysc,
+};
+
+/* spinlock */
+static struct omap_hwmod omap54xx_spinlock_hwmod = {
+	.name		= "spinlock",
+	.class		= &omap54xx_spinlock_hwmod_class,
+	.clkdm_name	= "l4cfg_clkdm",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = OMAP54XX_CM_L4CFG_SPINLOCK_CLKCTRL_OFFSET,
+			.context_offs = OMAP54XX_RM_L4CFG_SPINLOCK_CONTEXT_OFFSET,
+		},
+	},
+};
+
+/*
  * 'timer' class
  * general purpose timer module with accurate 1ms tick
  * This class contains several variants: ['timer_1ms', 'timer']
@@ -1960,6 +1995,14 @@  static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_cfg -> spinlock */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__spinlock = {
+	.master		= &omap54xx_l4_cfg_hwmod,
+	.slave		= &omap54xx_spinlock_hwmod,
+	.clk		= "l4_root_clk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_wkup -> timer1 */
 static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = {
 	.master		= &omap54xx_l4_wkup_hwmod,
@@ -2163,6 +2206,7 @@  static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
 	&omap54xx_l4_per__mmc4,
 	&omap54xx_l4_per__mmc5,
 	&omap54xx_l4_cfg__mpu,
+	&omap54xx_l4_cfg__spinlock,
 	&omap54xx_l4_wkup__timer1,
 	&omap54xx_l4_per__timer2,
 	&omap54xx_l4_per__timer3,