From patchwork Sun May 8 09:11:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rabin Vincent X-Patchwork-Id: 765382 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p489CEMU030231 for ; Sun, 8 May 2011 09:12:14 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751692Ab1EHJMN (ORCPT ); Sun, 8 May 2011 05:12:13 -0400 Received: from mail-bw0-f46.google.com ([209.85.214.46]:42810 "EHLO mail-bw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751412Ab1EHJMM convert rfc822-to-8bit (ORCPT ); Sun, 8 May 2011 05:12:12 -0400 Received: by bwz15 with SMTP id 15so3357675bwz.19 for ; Sun, 08 May 2011 02:12:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:from :date:x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=aZddB+HdDQTrT75LGxsadM0cLJMt5N+hOakIlmm+K+s=; b=xo5yAN4Atrv1oPtVpO0r+Az18rLooNcM45iRN955hfVsXKNQadmWlM+tLIdH9qOIOk DGOtI9A8RejeyxgTv6z9SJiLwJgCsD/vlr0UImpPaiji4KCF6HPaScacSGfW3kxfLlVp +Ww18jD9ttLPOcSLwiMy0Irca9TItBmIfH3uw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:from:date :x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; b=sKZIjjHoz6UhSV+8q9lXRMzqHWPk2++JG5blcuhP0TvLczuLXDHJch4zxiijxYHtv4 AM6J9EQq963grbbyqvfQCamLDqMs/A7L9WiprGPtcoyT5zDIsHMHfTvwTp6yj78wIWec EgJjkuCpJvCojEHpfCmHA51F6K0i8IPkYJuRE= Received: by 10.204.20.66 with SMTP id e2mr2404669bkb.141.1304845931205; Sun, 08 May 2011 02:12:11 -0700 (PDT) MIME-Version: 1.0 Received: by 10.204.80.65 with HTTP; Sun, 8 May 2011 02:11:31 -0700 (PDT) In-Reply-To: <2A3DCF3DA181AD40BDE86A3150B27B6B0374D103A2@dbde02.ent.ti.com> References: <2A3DCF3DA181AD40BDE86A3150B27B6B0374D103A2@dbde02.ent.ti.com> From: Rabin Vincent Date: Sun, 8 May 2011 14:41:31 +0530 X-Google-Sender-Auth: OL6Tc_2cRmydPPBNsyYmAd8OLZ8 Message-ID: Subject: Re: !CONFIG_OMAP_32K_TIMER on OMAP4/panda To: "Pedanekar, Hemant" Cc: linux-omap Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sun, 08 May 2011 09:12:14 +0000 (UTC) On Sun, May 8, 2011 at 10:29, Pedanekar, Hemant wrote: > diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c > index 3b9cf85..290fbfa 100644 > --- a/arch/arm/mach-omap2/timer-gp.c > +++ b/arch/arm/mach-omap2/timer-gp.c > @@ -229,6 +229,11 @@ static void __init omap2_gp_clocksource_init(void) >                "%s: failed to request dm-timer\n"; >        static char err2[] __initdata = KERN_ERR >                "%s: can't register clocksource!\n"; > +       char clocksource_hwmod_name[8]; /* 8 = sizeof("timerXX0") */ > + > +       /* XXX: This may not be always true, we might get different timer */ > +       sprintf(clocksource_hwmod_name, "timer%d", gptimer_id + 1); > +       omap_hwmod_setup_one(clocksource_hwmod_name); > >        gpt = omap_dm_timer_request(); >        if (!gpt) > Thanks, this appears to fix the gp timer clocksource on OMAP4: Tested-by: Rabin Vincent However, sched_clock() is broken with !CONFIG_OMAP_32K_TIMER, and it needs the below patch in addition to yours: 8<---------- From 3fa494b910cc65c31b661a0a99a9fcf207d9b795 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Sun, 8 May 2011 14:23:50 +0530 Subject: [PATCH] OMAP2+: use timer-gp as sched_clock when 32k timer is disabled When OMAP_32K_TIMER is disabled, sched_clock() always returns zero because it incorrectly always uses the (non-initialized) 32k timer clocksource. To fix this, make sched_clock() use the gp timer clocksource when the 32k timer is disabled. Signed-off-by: Rabin Vincent --- arch/arm/mach-omap2/timer-gp.c | 16 ++++++++++++++-- arch/arm/plat-omap/counter_32k.c | 8 ++++---- arch/arm/plat-omap/dmtimer.c | 2 +- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 3b9cf85..e783bfe 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -198,15 +198,20 @@ static void __init omap2_gp_clocksource_init(void) */ static DEFINE_CLOCK_DATA(cd); static struct omap_dm_timer *gpt_clocksource; -static cycle_t clocksource_read_cycles(struct clocksource *cs) +static cycle_t notrace clocksource_read_cycles(struct clocksource *cs) { return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); } +static cycle_t notrace clocksource_gpt_read_dummy(struct clocksource *cs) +{ + return 0; +} + static struct clocksource clocksource_gpt = { .name = "gp timer", .rating = 300, - .read = clocksource_read_cycles, + .read = clocksource_gpt_read_dummy, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -220,6 +225,12 @@ static void notrace dmtimer_update_sched_clock(void) update_sched_clock(&cd, cyc, (u32)~0); } +unsigned long long notrace sched_clock(void) +{ + u32 cyc = clocksource_gpt.read(&clocksource_gpt); + return cyc_to_sched_clock(&cd, cyc, (u32)~0); +} + /* Setup free-running counter for clocksource */ static void __init omap2_gp_clocksource_init(void) { @@ -240,6 +251,7 @@ static void __init omap2_gp_clocksource_init(void) omap_dm_timer_set_load_start(gpt, 1, 0); + clocksource_gpt.read = clocksource_read_cycles; init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); if (clocksource_register_hz(&clocksource_gpt, tick_rate)) diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index f7fed60..9231499 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -126,13 +126,13 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void) return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); } -#ifndef CONFIG_OMAP_MPU_TIMER -unsigned long long notrace sched_clock(void) +#ifdef CONFIG_OMAP_MPU_TIMER +unsigned long long notrace omap_32k_sched_clock(void) { return _omap_32k_sched_clock(); } -#else -unsigned long long notrace omap_32k_sched_clock(void) +#elif defined(CONFIG_OMAP_32K_TIMER) +unsigned long long notrace sched_clock(void) { return _omap_32k_sched_clock(); } diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index ee9f6eb..0648d63 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -700,7 +700,7 @@ void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) } EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); -unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) +unsigned int notrace omap_dm_timer_read_counter(struct omap_dm_timer *timer) { unsigned int l;