From patchwork Fri May 30 19:35:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 4273371 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 72DD5BEEA7 for ; Fri, 30 May 2014 19:35:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5F1A92039C for ; Fri, 30 May 2014 19:35:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2E0E520383 for ; Fri, 30 May 2014 19:35:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932498AbaE3Tfe (ORCPT ); Fri, 30 May 2014 15:35:34 -0400 Received: from mail-wi0-f169.google.com ([209.85.212.169]:54112 "EHLO mail-wi0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752203AbaE3Tfd (ORCPT ); Fri, 30 May 2014 15:35:33 -0400 Received: by mail-wi0-f169.google.com with SMTP id hi2so1599556wib.4 for ; Fri, 30 May 2014 12:35:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=J472FZT9Sha86+Te3dcgdKpFviRWfElyUtY/hOiHEyI=; b=eLkH9b+K+xQy3E0vDnu62LqsqeWCGPIV/zfa08UETzmjLYT0lHpkWsyCQ+7ORKEB8Z NAP/ZDRr4sWLn14XuXbVxuLu/OFXT8UhBNGJnAY/3s9tPR4pFDibef2ASAo+Y+q1Gv6O DiM6EgXOhF/9/jqNueyoEfolKkB/TJr107d+YRvIrTO9CoLQJ50frAcIPBjEZV7HuMlj wpN3Eo54+9zvnwp80nLIMLGbY/8Nl4LfQ3v0ud05oWn/WkoP+WsgFxPhhe6t8L5GD7GV hEDPt7tA6TXX1QeccIA7H1pOA/MEaZZGInXuBwU8qgNT71tEzFLfUWZsv1yYow1QJu36 oGMg== X-Gm-Message-State: ALoCoQnwXB8/NrxLr+2otElMeVrG9I2vB80TruHGbdoDRc5Jj0PiSLqCvdzqX+bDMAN7cB50GRfN MIME-Version: 1.0 X-Received: by 10.194.119.34 with SMTP id kr2mr25751565wjb.34.1401478530727; Fri, 30 May 2014 12:35:30 -0700 (PDT) Received: by 10.180.84.73 with HTTP; Fri, 30 May 2014 12:35:30 -0700 (PDT) X-Originating-IP: [95.23.101.217] In-Reply-To: <20140523151140.GF2321@atomide.com> References: <3385f19f3e1427613732f6d5c9f8513d@net2air.co> <7bd3dbc0c3217f43eefc8d228995690f@net2air.co> <20140523151140.GF2321@atomide.com> Date: Fri, 30 May 2014 21:35:30 +0200 Message-ID: Subject: Re: Accessing GPIOs from userspace using recent kernels From: Javier Martinez Canillas To: Tony Lindgren Cc: Linus Walleij , Peter TB Brett , "linux-arm-kernel@lists.infradead.org" , Linux-OMAP Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello Tony, On Fri, May 23, 2014 at 5:11 PM, Tony Lindgren wrote: > * Linus Walleij [140523 04:36]: >> On Fri, May 16, 2014 at 12:15 PM, Peter TB Brett wrote: >> > The current call chain seems to be: gpiod_export() --> gpiod_request() --> >> > omap_gpio_request(). Looking at other GPIO drivers, it seems like >> > omap_gpio_request() should eventually call pinctrl_request_gpio(). Would be >> > useful if someone who knows about OMAP4/gpio/pinctrl could take a look at >> > this. I looked briefly at adding pinctrl back-end commands to the OMAP GPIO driver. That is to make all GPIO operations fall through to the pinctrl-single driver as Linus suggested before. The changes in the GPIO driver are quite trivial, here is a RFC patch [0] that has only build tested but I think is useful to at least discuss this. Now, in order to make that patch to actually work someone has to register the chip GPIO range to pin controller mapping with gpiochip_add_pin_range() or something similar to make pinctrl_get_device_gpio_range() to succeed. The pinctrl-single driver has a "pinctrl-single,gpio-range" property that can be used to define a GPIO range to be registered. But the problem is as you said that since there are two different hw blocks for pin muxing and GPIO control, the pins that can be multiplexed as GPIO are scattered all over the padconf registers address space. So there isn't an easy way to specify the mapping and we will have to add an entry on "pinctrl-single,gpio-range" for every single GPIO pin (that's from 128 to 256 entries depending on the SoC). To make even more complicated, the padconf registers offset for GPIO pins are SoC specific so we need a mapping for each SoC. So I wonder if is worth to add all that information to the DTS files. Athough on the other hand is nice to have a better coordination between the GPIO and pinctrl drivers and as Tony said there are use cases where this is needed to workaround some silicion erratas. > > If we do this, we also need a solution to prevent automatic remuxing > of GPIO pins from happending. For wake-up events, some drivers need > to remux a rx pin to GPIO input for the duration of idle, and then > back to device rx pin. This is needed on some other platforms too > AFAIK. > > For the drivers needing GPIO wake-up events, request_gpio is done in > the driver after drivers/base/pinctrl.c has already muxed the device > pin to rx. At minimum we would get warnings about reserved pins if > we tried to automatically mux them to GPIO. > > We may be able to use some GPIO specific property to prevent > automatic remuxing as we discussed in the #armlinux few days ago. > Yes, adding a GPIO specific property to prevent automatic remuxing sounds sensible to me. > Related to automatic remuxing of GPIO pins, there are also other > needs for pinctrl and GPIO interaction. We need to remux GPIO output > pins to input + pull + safe_mode to prevent the GPIO pins losing > value briefly during off-idle. That's the gpio errata 1.158 at as > shown at least at [1]. Because the GPIO to pinctrl mapping is > sparse and SoC specific, there's currently now obvious way to do > that. And we would need few new GPIO functions to tell pinctrl > subsystem about the change. > I'm not that familiar with the pinctrl-single driver but can't that errata be handled on pinctrl-single without the GPIO OMAP driver intervention? I mean if we already add the complete GPIO <--> pin mapping using "pinctrl-single,gpio-range" then the pinctrl-single driver will know what pins can be muxed as GPIO and which ones were set as output with pinctrl_gpio_direction_output() and then can just mux these output GPIO pins to input + pull + safe_mode during off-idle. Or am I completely lost here? :-) > Regards, > > Tony > > > [1] https://www.gitorious.org/rowboat/kernel/commit/86b15f21298b749a9d8216ff1839d33ad542464e?format=patch Best regards, Javier [0] commit 96c886987219e37395a160f8bd0d228509c1d4f0 Author: Javier Martinez Canillas Date: Fri May 30 20:50:39 2014 +0200 gpio: omap: Make GPIO operations fall through pinctrl-single On OMAP platforms, there are two diferent hardware blocks for I/O multiplexing / pad configuration and GPIO control. So two different drivers are used: pinctrl-single and gpio-omap. Since two separate drivers are used there is no coordination between these and a I/O pad is not configured as a GPIO when a GPIO pin is requested. This patch adds pinctrl back-end commands to the GPIO OMAP driver so the pinmux_ops functions in the pinctrl-single driver are called for each GPIO operation. Signed-off-by: Javier Martinez Canillas * If this is the first gpio_request for the bank, @@ -704,6 +710,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) */ if (!BANK_USED(bank)) pm_runtime_put(bank->dev); + + pinctrl_free_gpio(chip->base + offset); } /* @@ -947,6 +955,11 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank; unsigned long flags; + int ret; + + ret = pinctrl_gpio_direction_input(chip->base + offset); + if (ret) + return ret; bank = container_of(chip, struct gpio_bank, chip); spin_lock_irqsave(&bank->lock, flags); @@ -973,6 +986,11 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) { struct gpio_bank *bank; unsigned long flags; + int ret; + + ret = pinctrl_gpio_direction_output(chip->base + offset); + if (ret) + return ret; bank = container_of(chip, struct gpio_bank, chip); spin_lock_irqsave(&bank->lock, flags); --- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 00f29aa..cee63c6 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #define OFF_MODE 1 @@ -664,6 +665,11 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); unsigned long flags; + int ret; + + ret = pinctrl_request_gpio(chip->base + offset); + if (ret) + return ret; /*