From patchwork Mon Sep 10 15:23:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1432461 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id A661D4025E for ; Mon, 10 Sep 2012 15:23:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753060Ab2IJPXy (ORCPT ); Mon, 10 Sep 2012 11:23:54 -0400 Received: from mail-wi0-f178.google.com ([209.85.212.178]:60998 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751257Ab2IJPXx (ORCPT ); Mon, 10 Sep 2012 11:23:53 -0400 Received: by wibhr14 with SMTP id hr14so2372602wib.1 for ; Mon, 10 Sep 2012 08:23:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:x-gm-message-state; bh=UgFyb9LC9QpXvr+DheY3k0zTgn9uvx32/22xTEDo02Y=; b=OHOW69BBucUBdEUyNQRfIlLl0j9sxUYI3knayLuGnzk6uGnhTjtOGkvdBqY/oxhjOD ZNLuH0CDodMzyNvWIRhcH5JbkQeRWt64SGtmpBCfTuAzu/vxjs3WXFrUfK2X6u4V74hv x6Ei5qftvbMLT4Z09zP4i5z8GFYWKiCBkq4vqXZgDOxUVwRpTAxSiKurEo7HyB+yVSBz ac0VQh90mGVzd2f+hCCU16+a4tjuLppkO331qqmMjeTmafT9IzezVdWbzMYnDgecuO1d 4rmQ/8gz+Fnq6BkaWMJ3AnSkonrhQT4H7ocQNm+ntg773I+goD9SXnJD965NiGJRCtT3 sW5A== MIME-Version: 1.0 Received: by 10.216.207.167 with SMTP id n39mr8839369weo.23.1347290631897; Mon, 10 Sep 2012 08:23:51 -0700 (PDT) Received: by 10.223.199.72 with HTTP; Mon, 10 Sep 2012 08:23:51 -0700 (PDT) In-Reply-To: <20120908234435.GA13519@glitch> References: <1346487390-11399-1-git-send-email-anilkumar@ti.com> <331ABD5ECB02734CA317220B2BBEABC13EA29819@DBDE01.ent.ti.com> <20120907110251.GA7968@glitch> <331ABD5ECB02734CA317220B2BBEABC13EA29BF3@DBDE01.ent.ti.com> <20120907160025.GB14330@glitch> <20120908234435.GA13519@glitch> Date: Mon, 10 Sep 2012 08:23:51 -0700 Message-ID: Subject: Re: [PATCH v2] leds: leds-gpio: adopt pinctrl support From: Linus Walleij To: Linus Walleij , "AnilKumar, Chimata" , "bryan.wu@canonical.com" , "rpurdie@rpsys.net" , "tony@atomide.com" , "devicetree-discuss@lists.ozlabs.org" , "linux-leds@vger.kernel.org" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Linus Walleij , Grant Likely , Stephen Warren X-Gm-Message-State: ALoCoQmcxAmO5OY1vPSiaxYuW3kZA9ZZD3345e2ZFT7imjfKWQJVYLCw+a9hGl1bte6ngIrNko0v Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org On Sun, Sep 9, 2012 at 1:44 AM, Domenico Andreoli wrote: > On Fri, Sep 07, 2012 at 11:57:59PM +0200, Linus Walleij wrote: >> >> If all you need to to is to multiplex the pins into GPIO mode, >> then the gpio_get() call on this driver *can* call through to >> pinctrl_request_gpio() which will in turn fall through to the >> above pinmux driver calls (.gpio_request_enable, etc). > > So if the GPIO driver doesn't coordinate with the pinctrl driver, it's > all left to the GPIO user to configure the pin before using it, right? Yes, more or less, or should I say that certain aspects of pinctrl are orthogonal to GPIO and the two mostly do not know of each other due to a separation of concerns. So the driver may need to tie things up and request its pinctrl and GPIOs independently. > I can understand the concerns of Tony, whether a pin must be requested > or not before the gpio then depends on the GPIO driver implementation, > which may or may not call through the pinctrl layer, isn't it?. Yes that is a sematic limitation, indeed. I think the best way of trying to eliminate that is to bring the two subsystems closer (which is some long-term project) but in the meantime we could propose a documentation fixup to make the semantics clear, what about this: From a92d754367861cf564c09e0b15746e02f0a96f3f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 10 Sep 2012 17:22:00 +0200 Subject: [PATCH] pinctrl: document semantics vs GPIO The semantics of the interactions between GPIO and pinctrl may be unclear, e.g. which one do you request first? This amends the documentation to make this clear. Reported-by: Domenico Andreoli Signed-off-by: Linus Walleij --- Documentation/pinctrl.txt | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index 1479aca..941e783 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -289,6 +289,29 @@ Interaction with the GPIO subsystem The GPIO drivers may want to perform operations of various types on the same physical pins that are also registered as pin controller pins. +First and foremost, the two subsystems can be used as completely orthogonal, +so say that your driver is fetching its resources like this: + +#include +#include + +struct pinctrl *pinctrl; +int gpio; + +pinctrl = devm_pinctrl_get_select_default(&dev); +gpio = devm_gpio_request(&dev, 14, "foo"); + +Here we first request a certain pin state and then request GPIO 14 to be +used. If you're using the subsystems orthogonally like this, always get +your pinctrl handle and select the desired pinctrl state BEFORE requesting +the GPIO. This is a semantic convention to avoid situations that can be +electrically unpleasant, you may certainly want to mux in and bias pins +a certain way before the GPIO subsystems starts to deal with them. + +But there are also situations where it makes sense for the GPIO subsystem +to communicate with with the pinctrl subsystem, using the latter as a +back-end. + Since the pin controller subsystem have its pinspace local to the pin controller we need a mapping so that the pin control subsystem can figure out which pin controller handles control of a certain GPIO pin. Since a single @@ -359,6 +382,7 @@ will get an pin number into its handled number range. Further it is also passed the range ID value, so that the pin controller knows which range it should deal with. + PINMUX interfaces =================