From patchwork Tue Jul 7 21:44:20 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ye janboe X-Patchwork-Id: 34522 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n67LiQXL029296 for ; Tue, 7 Jul 2009 21:44:26 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756276AbZGGVoZ (ORCPT ); Tue, 7 Jul 2009 17:44:25 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1756551AbZGGVoZ (ORCPT ); Tue, 7 Jul 2009 17:44:25 -0400 Received: from mail-gx0-f226.google.com ([209.85.217.226]:63737 "EHLO mail-gx0-f226.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756276AbZGGVoY (ORCPT ); Tue, 7 Jul 2009 17:44:24 -0400 Received: by gxk26 with SMTP id 26so2407843gxk.13 for ; Tue, 07 Jul 2009 14:44:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:date:message-id:subject :from:to:cc:content-type:content-transfer-encoding; bh=rJ7XSi/kvYsQv0CfA/Djbz2KR2rvaLqQhOK2AzKJt4c=; b=mhwnTYCKvqnLLmyorl4jHx+f4p/pspOkAy2yYFJ4fBkRsds7Q23TJkkQQmcWZ5dLi5 c8GF7ZpdO2T/mNVCHGMRJLHst5JEUix1JW6KNQQ0w+seXq7wu12Nswomf5YipXt376c/ BSifnXN2Gk6InPAyb8LsRpHy4j8M6yC+iS2Fs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=X/MV9woGQahhlDdbIGTJCzFAHLNSh6Wl2ptBpM/IBrgWfTVQmYMZmgGymWJQ8mSUwM ++nbb8IvET1zUhY8eA47T4m0oxoKt6HImNx5GSB5SCHTW+74Nxyl/BId0Fnp5FGJ/rGy lwnezNdY/iDLlTuV3KWPu9soF6aEM022KwLA4= MIME-Version: 1.0 Received: by 10.90.81.9 with SMTP id e9mr1308987agb.50.1247003062580; Tue, 07 Jul 2009 14:44:22 -0700 (PDT) Date: Tue, 7 Jul 2009 16:44:20 -0500 Message-ID: Subject: [PATCH] Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh before suspend From: ye janboe To: paul@pwsan.com Cc: linux-omap@vger.kernel.org, khilman@deeprootsystems.com Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi, Paul I saw you clear clear the SDRC PWRENA bit during SDRC frequency change but not during suspend. Please review if it is necessary to clear PWRENA bit during suspend. Thanks Janboe Ye rom 287db2e188391be0ac95128131724e0e035e945a Mon Sep 17 00:00:00 2001 From: janboe Date: Tue, 7 Jul 2009 16:30:26 -0500 Subject: [PATCH] Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh and then suspend Signed-off-by: janboe --- arch/arm/mach-omap2/sleep34xx.S | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index e5e2553..2bc0c3b 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -70,6 +70,7 @@ loop: ldr r4, sdrc_power @ read the SDRC_POWER register ldr r5, [r4] @ read the contents of SDRC_POWER orr r5, r5, #0x40 @ enable self refresh on idle req + bic r5, r5, #0x4 @ clear PWDENA str r5, [r4] @ write back to SDRC_POWER register cmp r1, #0x0