From patchwork Thu Jun 25 07:11:43 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 32324 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5P7Bkde009237 for ; Thu, 25 Jun 2009 07:11:46 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752224AbZFYHLl (ORCPT ); Thu, 25 Jun 2009 03:11:41 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752332AbZFYHLl (ORCPT ); Thu, 25 Jun 2009 03:11:41 -0400 Received: from utopia.booyaka.com ([72.9.107.138]:57527 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752224AbZFYHLk (ORCPT ); Thu, 25 Jun 2009 03:11:40 -0400 Received: (qmail 20097 invoked by uid 526); 25 Jun 2009 07:11:43 -0000 Date: Thu, 25 Jun 2009 01:11:43 -0600 (MDT) From: Paul Walmsley To: linux-omap@vger.kernel.org Subject: [PATCH] OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on boot Message-ID: User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Stop setting SDRC_POWER.PWDENA on boot. Turns out there is a nasty erratum (34xx erratum 1.150) that can cause memory corruption if PWDENA is enabled. Based originally on a patch from Samu P. Onkalo . Tested on BeagleBoard rev C2. Signed-off-by: Paul Walmsley Cc: Samu P. Onkalo . --- arch/arm/mach-omap2/sdrc.c | 5 ++++- arch/arm/mach-omap2/sram34xx.S | 2 -- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 2e9e38d..9e3bd4f 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -125,8 +125,11 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, sdrc_init_params_cs1 = sdrc_cs1; /* XXX Enable SRFRONIDLEREQ here also? */ + /* + * PWDENA should not be set due to 34xx erratum 1.150 - PWDENA + * can cause random memory corruption + */ l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | - (1 << SDRC_POWER_PWDENA_SHIFT) | (1 << SDRC_POWER_PAGEPOLICY_SHIFT); sdrc_write_reg(l, SDRC_POWER); } diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 3aef744..9c2d046 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -58,7 +58,6 @@ /* SDRC_POWER bit settings */ #define SRFRONIDLEREQ_MASK 0x40 -#define PWDENA_MASK 0x4 /* CM_IDLEST1_CORE bit settings */ #define ST_SDRC_MASK 0x2 @@ -160,7 +159,6 @@ sdram_in_selfrefresh: ldr r12, [r11] @ read the contents of SDRC_POWER mov r9, r12 @ keep a copy of SDRC_POWER bits orr r12, r12, #SRFRONIDLEREQ_MASK @ enable self refresh on idle - bic r12, r12, #PWDENA_MASK @ clear PWDENA str r12, [r11] @ write back to SDRC_POWER register ldr r12, [r11] @ posted-write barrier for SDRC idle_sdrc: