From patchwork Fri Feb 25 20:07:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 591121 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1PK7pFp010289 for ; Fri, 25 Feb 2011 20:07:52 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932868Ab1BYUHs (ORCPT ); Fri, 25 Feb 2011 15:07:48 -0500 Received: from utopia.booyaka.com ([72.9.107.138]:56889 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932778Ab1BYUHr (ORCPT ); Fri, 25 Feb 2011 15:07:47 -0500 Received: (qmail 4383 invoked by uid 1019); 25 Feb 2011 20:07:46 -0000 Date: Fri, 25 Feb 2011 13:07:46 -0700 (MST) From: Paul Walmsley To: Santosh Shilimkar cc: linux-omap@vger.kernel.org, khilman@ti.com, b-cousson@ti.com, rnayak@ti.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/9] omap4: prcm: Fix the CPUx clockdomain offsets In-Reply-To: <1296813544-25170-3-git-send-email-santosh.shilimkar@ti.com> Message-ID: References: <1296813544-25170-1-git-send-email-santosh.shilimkar@ti.com> <1296813544-25170-3-git-send-email-santosh.shilimkar@ti.com> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 25 Feb 2011 20:07:52 +0000 (UTC) diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 729a644..3300ff6 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h @@ -38,8 +38,8 @@ #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 /* PRCM_MPU clockdomain register offsets (from instance start) */ -#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000 -#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000 +#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018 +#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018 /*