From patchwork Thu Apr 8 13:46:21 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Sakoman X-Patchwork-Id: 91274 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o38DkOfe014226 for ; Thu, 8 Apr 2010 13:46:24 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758661Ab0DHNqX (ORCPT ); Thu, 8 Apr 2010 09:46:23 -0400 Received: from mail-qy0-f179.google.com ([209.85.221.179]:43055 "EHLO mail-qy0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758597Ab0DHNqW (ORCPT ); Thu, 8 Apr 2010 09:46:22 -0400 Received: by qyk9 with SMTP id 9so109750qyk.1 for ; Thu, 08 Apr 2010 06:46:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:date:received:message-id :subject:from:to:content-type; bh=/VV+stmwJfMlQ7d7cYBOpVr+/C8g4O28XfHxkBja0hQ=; b=H/xf3Vc2T2E3BMwrVyMZbxvo1sjb3Lz7h03uI1d9br9ebqInQFZy8i6QXk3IzP6jL7 +95ePBNVfZ3qL6fknhU8EO63wjsALzhPgLO1pkwX2JBZ4w2oi8iTheQZkvENMogyqzI7 EhWexl9kMs7asQuAj2ZVOwaZr0YlGK1r3SQn0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=f+hsqQyCamY26KQRwtrz0zNiHU5rhdXJ1zWfq9iM3zia43yirzLRyXM1fDshSmWR/j jDbqcIzhuPeTnkI7GgzxVbLH4BZEzvrk1TFvE1tyrHuwf+cgMIdawd1H/JtctV1guJjj qz7M0VrVaDdQOHZMJQZmqtxzo2+bJTHolEhD8= MIME-Version: 1.0 Received: by 10.229.70.133 with HTTP; Thu, 8 Apr 2010 06:46:21 -0700 (PDT) Date: Thu, 8 Apr 2010 06:46:21 -0700 Received: by 10.229.73.135 with SMTP id q7mr257284qcj.41.1270734381944; Thu, 08 Apr 2010 06:46:21 -0700 (PDT) Message-ID: Subject: [PATCHv2] ARM: OMAP: Beagle: use new gpmc nand infrastructure From: Steve Sakoman To: linux-omap@vger.kernel.org Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 08 Apr 2010 13:46:24 +0000 (UTC) diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 962d377..3ba0603 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -52,6 +52,11 @@ #define NAND_BLOCK_SIZE SZ_128K +struct flash_partitions { + struct mtd_partition *parts; + int nr_parts; +}; + static struct mtd_partition omap3beagle_nand_partitions[] = { /* All the partition sizes are listed in terms of NAND block size */ { @@ -83,28 +88,102 @@ static struct mtd_partition omap3beagle_nand_partitions[] = { }, }; +static struct flash_partitions omap3beagle_flash_partitions[] = { + { + /* NOR flash */ + }, + { + /* OneNAND */ + }, + { + /* NAND */ + .parts = omap3beagle_nand_partitions, + .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions), + }, +}; + +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) + +/* Note that all values in this struct are in nanoseconds */ +static struct gpmc_timings nand_timings = { + + .sync_clk = 0, + + .cs_on = 0, + .cs_rd_off = 36, + .cs_wr_off = 36, + + .adv_on = 6, + .adv_rd_off = 24, + .adv_wr_off = 36, + + .we_off = 30, + .oe_off = 48, + + .access = 54, + .rd_cycle = 72, + .wr_cycle = 72, + + .wr_access = 30, + .wr_data_mux_bus = 0, +}; + static struct omap_nand_platform_data omap3beagle_nand_data = { - .options = NAND_BUSWIDTH_16, - .parts = omap3beagle_nand_partitions, - .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions), - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ .nand_setup = NULL, + .gpmc_t = &nand_timings, + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ .dev_ready = NULL, + .devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */ }; -static struct resource omap3beagle_nand_resource = { - .flags = IORESOURCE_MEM, -}; +static void +__init board_nand_init(struct flash_partitions omap3beagle_nand_parts, u8 cs) +{ + omap3beagle_nand_data.cs = cs; + omap3beagle_nand_data.parts = omap3beagle_nand_parts.parts; + omap3beagle_nand_data.nr_parts = omap3beagle_nand_parts.nr_parts; + omap3beagle_nand_data.gpmc_baseaddr = (void *) (OMAP34XX_GPMC_VIRT); -static struct platform_device omap3beagle_nand_device = { - .name = "omap2-nand", - .id = -1, - .dev = { - .platform_data = &omap3beagle_nand_data, - }, - .num_resources = 1, - .resource = &omap3beagle_nand_resource, -}; + omap3beagle_nand_data.gpmc_cs_baseaddr = (void *)(OMAP34XX_GPMC_VIRT + + GPMC_CS0_BASE + cs * GPMC_CS_SIZE); + + gpmc_nand_init(&omap3beagle_nand_data); +} +#else +static void +__init board_nand_init(struct flash_partitions omap3beagle_nand_parts, u8 cs) +{ +} +#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ + +static void +__init omap3beagle_flash_init(struct flash_partitions partition_info[]) { + u8 cs = 0; + u8 nandcs = GPMC_CS_NUM + 1; + + /* find out the chip-select on which NAND exists */ + while (cs < GPMC_CS_NUM) { + u32 ret = 0; + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + if ((ret & 0xC00) == 0x800) { + printk(KERN_INFO "Found NAND on CS%d\n", cs); + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + } + cs++; + } + + if (nandcs > GPMC_CS_NUM) { + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); + return; + } + + if (nandcs < GPMC_CS_NUM) + board_nand_init(partition_info[2], nandcs); +} #include "sdram-micron-mt46h32m32lf-6.h"