From patchwork Mon Dec 26 11:46:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 9488601 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E259E60839 for ; Mon, 26 Dec 2016 11:46:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB6571FF65 for ; Mon, 26 Dec 2016 11:46:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9C43920373; Mon, 26 Dec 2016 11:46:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B95B1FF65 for ; Mon, 26 Dec 2016 11:46:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753517AbcLZLqP (ORCPT ); Mon, 26 Dec 2016 06:46:15 -0500 Received: from mout.gmx.net ([212.227.15.15]:53277 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751252AbcLZLqO (ORCPT ); Mon, 26 Dec 2016 06:46:14 -0500 Received: from p100.box ([92.203.10.38]) by mail.gmx.com (mrgmx003 [212.227.17.190]) with ESMTPSA (Nemesis) id 0MC4y8-1cCiHl2vx2-008r8y; Mon, 26 Dec 2016 12:46:05 +0100 Date: Mon, 26 Dec 2016 12:46:01 +0100 From: Helge Deller To: linux-parisc@vger.kernel.org, James Bottomley , John David Anglin Subject: [PATCH] parisc: Mark cr16 clocksource unstable on SMP systems Message-ID: <20161226114601.GA5893@p100.box> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-Provags-ID: V03:K0:uOBC+mBQYwd4/5beQ7mrDZsxh464H7VSgTrnf95GRAwxqG8PzGf 1WQqLwv+UmRa54yTVZtK5M7bDmZuYRE28lGAP4nha9iBuuEmYkcDKTxdA5LhT8bld1IBKR8 55myH551AHEBF7oFhGMkYWM2Ew2mfPbfTAT/4lUVk246wstctS/pCtqtO4p0xIqoyZ4vYW8 0YnlMVQxU6C4kdCE9SMDw== X-UI-Out-Filterresults: notjunk:1; V01:K0:UXLa3L9l7jY=:44Xe6mmBjk/LHFlxc+WHEU oshaVpeYJZlTA31HE6i75BgcI2DtoWzGpR7IZyupukpkPN4Ci9LhXd9lf2eLQDIrrpUfVpag3 5s45vNClM+s+nhqmeU8ev+/QM1Oyv/QmoNXUxe8h5YDliBFp9NBF6qQCYqB8Z07riZUjy6PiF aZpWRGYr7dNtAhXAKRnR1Z3kQENgZsEU8nvm7oor/n3XE4KNY1nf0eiXx9DIQjsyDwQ+hu49y T51eXDzE6OymMsj+azgLJTac7FRlhlJ5ffzeSLqoYX+/Xr4XtNqnf2LMfPsj7Otw0V8tO/anx x5nxvhaKU0sfRBmilrtMsbQCK6m/5dUzC6TRZJk8Vpod4dyY8a+fjDiCdIPebFZmulCKAqGEu TFTU/pj4aACDj4HXYKfZnebQdw9tPKs94gzHpcj4nFRmaxzar/bFDWcFajkjd98/ZnJWolydf XirsXrdwLz1GSfnHvVDB085dDsULmriNK/ZNjikqKR7pGF1XTPHBQ4HvsnDEQXZV9KCkUYJJs ouxomPHQk4Z1MGEiVxfetS8MG7w4x38KTuSSVvx0UzJixiyuEHXkTode3ha/wUroVimex7Zvj aVbdrALqTL7WrlCBhkmi816XHqMS12Tr9KRxaAb/YMfdkY1YXF1hQF2HerjX5hjNdKv767loA DUMaQ4E9UlE9Kru9b5NlSY42JFPW+yt4zxBdr3smyeFfm1RnzVFFhTTXZ8FzEm9A7jyuaqSid XNCANdbBceGjNRufG71GoUGDyAmzgkJrCDMleXES29QpkfR2C78JzDlpFQA= Sender: linux-parisc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The cr16 interval timer of each CPU is not syncronized to other cr16 timers in other CPUs in a SMP system. So, delay the registration of the cr16 clocksource until all CPUs have been detected and then mark it as unstable and lower it's rating before registering it at the clockource framework. This patch fixes the stalled CPU warnings which we have seen since introduction of the cr16 clocksource. Signed-off-by: Helge Deller --- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index 325f30d..47ef8fd 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c @@ -289,9 +289,26 @@ void __init time_init(void) cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */ - /* register at clocksource framework */ - clocksource_register_hz(&clocksource_cr16, cr16_hz); - /* register as sched_clock source */ sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz); } + +static int __init init_cr16_clocksource(void) +{ + /* + * The cr16 interval timers are not syncronized across CPUs, so mark + * them unstable and lower rating on SMP systems. + */ + if (num_online_cpus() > 1) { + clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; + clocksource_cr16.rating = 0; + } + + /* register at clocksource framework */ + clocksource_register_hz(&clocksource_cr16, + 100 * PAGE0->mem_10msec); + + return 0; +} + +device_initcall(init_cr16_clocksource);