[v1,1/1] parisc: add support for cmpxchg on u8 pointers

Commit Message

Liam Beguin July 18, 2020, 8:10 p.m. UTC

The kernel test bot reported[1] that using set_mask_bits on a u8 causes
the following issue on parisc:

	hppa-linux-ld: drivers/phy/ti/phy-tusb1210.o: in function `tusb1210_probe':
	>> (.text+0x2f4): undefined reference to `__cmpxchg_called_with_bad_pointer'
	>> hppa-linux-ld: (.text+0x324): undefined reference to `__cmpxchg_called_with_bad_pointer'
	hppa-linux-ld: (.text+0x354): undefined reference to `__cmpxchg_called_with_bad_pointer'

Add support for cmpxchg on u8 pointers.

[1] https://lore.kernel.org/patchwork/patch/1272617/#1468946

Reported-by: kernel test robot <[e-mail]>
Signed-off-by: Liam Beguin <[e-mail]>
---
 arch/parisc/include/asm/cmpxchg.h |  2 ++
 arch/parisc/lib/bitops.c          | 12 ++++++++++++
 2 files changed, 14 insertions(+)

Hi,

This was reported by the kernel test bot on an architecture I can't
really test on. I was only able to make sure this builds, nothing more.

Should I also add __cmpxchg_u8 in the cmpxchg_local switch case?

There are one or two minor cleanups we can do around that patch, but
because of my limited testing options, I kept the changes to a minimum.

If there's interest, I can include these in follow up patches:
- update __cmpxchg_u32 to use u32 instead of unsigned int for
  consistency
- add support for __cmpxchg_u16

Thanks,
Liam


base-commit: 6cf7ccba29dcf39ab27630c383a3844078a6d5cd

Comments

John David Anglin July 19, 2020, 2:37 p.m. UTC | #1

Looks good to me.

On 2020-07-18 4:10 p.m., Liam Beguin wrote:
> Reported-by: kernel test robot <[e-mail]>
> Signed-off-by: Liam Beguin <[e-mail]>

Tested-by: Dave Anglin <[e-mail]>

> ---
>  arch/parisc/include/asm/cmpxchg.h |  2 ++
>  arch/parisc/lib/bitops.c          | 12 ++++++++++++
>  2 files changed, 14 insertions(+)

Patch

diff --git a/arch/parisc/include/asm/cmpxchg.h b/arch/parisc/include/asm/cmpxchg.h
index ab5c215cf46c..068958575871 100644
--- a/arch/parisc/include/asm/cmpxchg.h
+++ b/arch/parisc/include/asm/cmpxchg.h
@@ -60,6 +60,7 @@  extern void __cmpxchg_called_with_bad_pointer(void);
 extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,
 				   unsigned int new_);
 extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);
+extern u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new_);
 
 /* don't worry...optimizer will get rid of most of this */
 static inline unsigned long
@@ -71,6 +72,7 @@  __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
 #endif
 	case 4: return __cmpxchg_u32((unsigned int *)ptr,
 				     (unsigned int)old, (unsigned int)new_);
+	case 1: return __cmpxchg_u8((u8 *)ptr, (u8)old, (u8)new_);
 	}
 	__cmpxchg_called_with_bad_pointer();
 	return old;
diff --git a/arch/parisc/lib/bitops.c b/arch/parisc/lib/bitops.c
index 70ffbcf889b8..2e4d1f05a926 100644
--- a/arch/parisc/lib/bitops.c
+++ b/arch/parisc/lib/bitops.c
@@ -79,3 +79,15 @@  unsigned long __cmpxchg_u32(volatile unsigned int *ptr, unsigned int old, unsign
 	_atomic_spin_unlock_irqrestore(ptr, flags);
 	return (unsigned long)prev;
 }
+
+u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new)
+{
+	unsigned long flags;
+	u8 prev;
+
+	_atomic_spin_lock_irqsave(ptr, flags);
+	if ((prev = *ptr) == old)
+		*ptr = new;
+	_atomic_spin_unlock_irqrestore(ptr, flags);
+	return prev;
+}