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include:mktomail.com include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-10-11_07:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=271 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810110156 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These patches were previously in the patch series: "Add MSI-X support for cadence EP driver" They add fixes for MSI issues discovered during testing of MSI-X - Use AXI region 0 for interrupt signalling - Write MSI with 32bit value rather than 16bit - Check for masking before sending MSI - Check link is up before sending IRQ Changes since v3: - Rebase on Lorenzo's pci/cadence branch Changes since v2: - None Changes since v1: - Rebased on 4.18-rc1 - Update commit log to mark first 4 patches as fixes - Correct formatting issues pointed out by checkpatch --strict Alan Douglas (4): PCI: cadence: Use AXI region 0 to signal interrupts from EP PCI: cadence: Write MSI data with 32bits PCI: cadence: Check whether MSI is masked before sending it PCI: cadence: Check link is up before sending IRQ from EP drivers/pci/controller/pcie-cadence-ep.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-)