From patchwork Sat Apr 3 08:54:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dongdong Liu X-Patchwork-Id: 12181841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0F41C43461 for ; Sat, 3 Apr 2021 09:16:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 80CF661222 for ; Sat, 3 Apr 2021 09:16:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236105AbhDCJQ3 (ORCPT ); Sat, 3 Apr 2021 05:16:29 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:15473 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236731AbhDCJQ1 (ORCPT ); Sat, 3 Apr 2021 05:16:27 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FCB7X1LW7zyNht; Sat, 3 Apr 2021 17:14:16 +0800 (CST) Received: from linux-ioko.site (10.78.228.23) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.498.0; Sat, 3 Apr 2021 17:16:17 +0800 From: Dongdong Liu To: , Subject: [PATCH 0/4] PCI: Enable 10-Bit tag support for PCIe devices Date: Sat, 3 Apr 2021 16:54:15 +0800 Message-ID: <1617440059-2478-1-git-send-email-liudongdong3@huawei.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.78.228.23] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org 10-Bit Tag capability, introduced in PCIe-4.0 increases the total Tag field size from 8 bits to 10 bits. This patchset is to enable 10-Bit tag for PCIe EP devices (include VF) and RP devices. Dongdong Liu (4): PCI: Add 10-Bit Tag register definitions PCI: Enable 10-Bit tag support for PCIe Endpoint devices PCI/IOV: Enable 10-Bit tag support for PCIe VF devices PCI: Enable 10-Bit tag support for PCIe RP devices drivers/pci/iov.c | 8 +++ drivers/pci/pci.h | 2 + drivers/pci/pcie/portdrv_pci.c | 3 + drivers/pci/probe.c | 125 +++++++++++++++++++++++++++++++++++++++++ include/linux/pci.h | 1 + include/uapi/linux/pci_regs.h | 5 ++ 6 files changed, 144 insertions(+) --- 1.9.1