From patchwork Thu Apr 15 12:48:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "liuqi (BA)" X-Patchwork-Id: 12205361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18A9DC43460 for ; Thu, 15 Apr 2021 12:48:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DD9806124B for ; Thu, 15 Apr 2021 12:48:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232662AbhDOMs0 (ORCPT ); Thu, 15 Apr 2021 08:48:26 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:16126 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231549AbhDOMsZ (ORCPT ); Thu, 15 Apr 2021 08:48:25 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FLfFF6z49zpYZF; Thu, 15 Apr 2021 20:45:05 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Thu, 15 Apr 2021 20:47:49 +0800 From: Qi Liu To: , , CC: , , , , Subject: [PATCH v3 0/2] drivers/perf: hisi: Add support for PCIe PMU Date: Thu, 15 Apr 2021 20:48:03 +0800 Message-ID: <1618490885-44612-1-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patchset adds support for HiSilicon PCIe Performance Monitoring Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root ports and all Endpoints downstream these root ports. HiSilicon PCIe PMU is supported to collect performance data of PCIe bus, such as: bandwidth, latency etc. This patchset is based on 5.12-rc6. Changes since v2: - Address the comments from John. - Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/ Changes since v1: - Drop the internal Reviewed-by tag. - Fix some build warnings when W=1. - Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/ Qi Liu (2): docs: perf: Add description for HiSilicon PCIe PMU driver drivers/perf: hisi: Add driver for HiSilicon PCIe PMU Documentation/admin-guide/perf/hisi-pcie-pmu.rst | 104 +++ MAINTAINERS | 6 + drivers/perf/Kconfig | 2 + drivers/perf/Makefile | 1 + drivers/perf/pci/Kconfig | 16 + drivers/perf/pci/Makefile | 2 + drivers/perf/pci/hisilicon/Makefile | 3 + drivers/perf/pci/hisilicon/hisi_pcie_pmu.c | 1014 ++++++++++++++++++++++ include/linux/cpuhotplug.h | 1 + 9 files changed, 1149 insertions(+) create mode 100644 Documentation/admin-guide/perf/hisi-pcie-pmu.rst create mode 100644 drivers/perf/pci/Kconfig create mode 100644 drivers/perf/pci/Makefile create mode 100644 drivers/perf/pci/hisilicon/Makefile create mode 100644 drivers/perf/pci/hisilicon/hisi_pcie_pmu.c