From patchwork Thu Sep 6 15:50:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 10590737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18F69112B for ; Thu, 6 Sep 2018 15:50:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E7532AE61 for ; Thu, 6 Sep 2018 15:50:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 021722AE9D; Thu, 6 Sep 2018 15:50:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9958E2AE61 for ; Thu, 6 Sep 2018 15:50:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730342AbeIFU0c (ORCPT ); Thu, 6 Sep 2018 16:26:32 -0400 Received: from mga14.intel.com ([192.55.52.115]:48485 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730291AbeIFU0b (ORCPT ); Thu, 6 Sep 2018 16:26:31 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Sep 2018 08:50:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,338,1531810800"; d="scan'208";a="255054171" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 06 Sep 2018 08:50:21 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id B2168B2; Thu, 6 Sep 2018 18:50:20 +0300 (EEST) From: Mika Westerberg To: Bjorn Helgaas , "Rafael J. Wysocki" Cc: Len Brown , Lukas Wunner , Keith Busch , Ashok Raj , Mario.Limonciello@dell.com, Anthony Wong , "D . J . Bernstein" , Linus Walleij , Mika Westerberg , linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH 00/10] PCI: Allow D3cold for PCIe hierarchies Date: Thu, 6 Sep 2018 18:50:10 +0300 Message-Id: <20180906155020.51700-1-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.18.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi all, This patch series aims to allow PCIe hierarchies enter D3cold both during system sleep and runtime, including PCIe hotplug ports. The motivation of this series are recent systems such as Lenovo Thinkpad X1 Carbon 6th gen and upcoming Dell laptops where the Thunderbolt controller is always present in the system (pretty much like what Apple systems have been doing for years). Because it is always present it consumes energy so it is important to power it off when idle. The PCIe root port hosting the Thunderbolt controller and all the connected external PCIe devices includes a standard ACPI power resource and related methods _PR3, _PR0, _PRW and _DSW that take care of the actual transition to D3cold and back to D0. With current kernels entering system sleep states leaves the root port into D3hot which means the ACPI power resource is still on. This is bad when system enters suspend-to-idle (all these systems are s2idle only) because the BIOS is not involved and the devices are effectively left on, consuming battery unnecessarily. Patches 1-4 add D3cold support for system sleep and the subsequent patches do the same for runtime PM. In case someone wants to try out runtime PM, the xHCI controller that is part of the PCIe switch below the root port needs to have runtime PM "unblocked" manually (this will be automatic in future). For Thinkpad: # echo auto > /sys/bus/pci/devices/0000:3b:00.0/power/control For Dell: # echo auto > /sys/bus/pci/devices/0000:39:00.0/power/control Note if the root port enters D3cold, running things like 'lspci' brings it back t0 D0 (because PCI config space is not accessible in D3cold) so if one wants to check out the power state without accidentally bringing the device back into D0 needs to do that indirectly. If the root port is 1d.0 power state can be checked: # cat /sys/bus/pci/devices/0000:00:1d.0/power/runtime_status suspended # cat /sys/bus/pci/devices/0000:00:1d.0/firmware_node/real_power_state D3cold Even if this again revolves around Thunderbolt I think these apply to any PCIe system supporting D3cold. These patches apply on top of pci.git pci/hotplug. Mika Westerberg (10): PCI: Do not skip power managed bridges in pci_enable_wake() PCI / ACPI: Enable wake automatically for power managed bridges PCI: pciehp: Disable hotplug interrupt during suspend PCI: pciehp: Do not handle events if interrupts are masked PCI: portdrv: Resume upon exit from system suspend if left runtime suspended PCI: portdrv: Add runtime PM hooks for port service drivers PCI: pciehp: Implement runtime PM callbacks PCI/PME: Implement runtime PM callbacks ACPI / property: Allow multiple property compatible _DSD entries PCI / ACPI: Whitelist D3 for more PCIe hotplug ports drivers/acpi/property.c | 97 ++++++++++++++++++++++--------- drivers/acpi/x86/apple.c | 2 +- drivers/gpio/gpiolib-acpi.c | 2 +- drivers/pci/hotplug/pciehp.h | 2 + drivers/pci/hotplug/pciehp_core.c | 37 ++++++++++++ drivers/pci/hotplug/pciehp_hpc.c | 16 ++++- drivers/pci/pci-acpi.c | 56 +++++++++++++++++- drivers/pci/pci.c | 15 ++++- drivers/pci/pci.h | 3 + drivers/pci/pcie/pme.c | 27 +++++++++ drivers/pci/pcie/portdrv.h | 4 ++ drivers/pci/pcie/portdrv_core.c | 20 +++++++ drivers/pci/pcie/portdrv_pci.c | 28 ++++++--- include/acpi/acpi_bus.h | 8 ++- include/linux/acpi.h | 9 +++ 15 files changed, 285 insertions(+), 41 deletions(-)