From patchwork Mon Sep 14 11:26:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanjia Liu X-Patchwork-Id: 11773577 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D4AC6746 for ; Mon, 14 Sep 2020 11:31:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A80CB21973 for ; Mon, 14 Sep 2020 11:31:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="onUVFc4N" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725964AbgINLbL (ORCPT ); Mon, 14 Sep 2020 07:31:11 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:10087 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726102AbgINLaB (ORCPT ); Mon, 14 Sep 2020 07:30:01 -0400 X-UUID: 7931e12f8b484086ac09751e8545ef09-20200914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=PEhItO3FI00zCynCyOZJCO9f+PedrDX9uq/sSJ/84Ro=; b=onUVFc4NthU2+EZ2n+lZcbeZ+kx2rmR6KPF7NZiLOAdHGoRutQU5+BTEWVDBsbwmz4/ddLJpIuTv4Hbdksma2yUtEOysAKhG9MlAk+7rKhtR5mvP03aUPYgh2qUeXmlBd62eG8GwHnFvF/cAJYkKjdP05Ywm/w/2WDVGdYvXy2E=; X-UUID: 7931e12f8b484086ac09751e8545ef09-20200914 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1698551436; Mon, 14 Sep 2020 19:29:33 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 19:29:23 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 19:29:23 +0800 From: Chuanjia Liu To: Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Matthias Brugger CC: , , , , , Frank Wunderlich , Ryder Lee Subject: [PATCH v6 0/4] Spilt PCIe node to comply with hardware design Date: Mon, 14 Sep 2020 19:26:55 +0800 Message-ID: <20200914112659.7091-1-chuanjia.liu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 8543CC27B5C0BF586E95D1EAE5D1FED90A5EEA9E793042D1C11942EA46B8D07E2000:8 X-MTK: N Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Split the PCIe node for MT2712 and MT7622 platform to fix MSI issue and comply with the hardware design. change note: v6:Fix yaml error. Make sure driver compatible with old and new DTS format. v5:rebase for 5.9-rc1, no code change. v4:change commit message due to bayes statistical bogofilter considers this series patch SPAM. v3:rebase for 5.8-rc1. Only collect ack of Ryder, No code change. v2:change the allocation of MT2712 PCIe MMIO space due to the allocation size is not right in v1. Chuanjia Liu (4): dt-bindings: pci: mediatek: Modified the Device tree bindings PCI: mediatek: Add new method to get shared pcie-cfg base and irq arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 ARM: dts: mediatek: Modified MT7629 PCIe node .../bindings/pci/mediatek-pcie-cfg.yaml | 37 +++++ .../devicetree/bindings/pci/mediatek-pcie.txt | 139 +++++++++++------- arch/arm/boot/dts/mt7629-rfb.dts | 3 +- arch/arm/boot/dts/mt7629.dtsi | 22 +-- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 ++++++---- .../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 +- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 66 ++++++--- drivers/pci/controller/pcie-mediatek.c | 23 ++- 9 files changed, 253 insertions(+), 134 deletions(-)