[V6,0/3] PCI: vmd: Enable PCIe ASPM and LTR

Message

David E. Box March 1, 2022, 4:19 a.m. UTC

This series adds support for enabling PCIe ASPM and for setting PCIe LTR
values on devices on root ports reserved by VMD. Configuration of these
capabilities is usually done by BIOS. But for VMD ports these capabilities
will not be configured because those ports are not visible to BIOS. For
future products, post Alder Lake, the hardware team has agreed to do this
enabling in BIOS.  But this will not apply to current products, so this
work around is provided for them. Without this, laptops running in VMD mode
will not be able to power gate roots ports, resulting in higher power
consumption.

Since V4 we have more information from the BIOS team as to why BIOS
needs to program device LTRs. This is something that should be done by
devices, but there are many that don't provide LTR values causing them
to block SoC level power management. BIOS sets an initial default LTR to
account for such devices. This SoC specific value is the maximum latency
required to allow the SoC to enter the deepest power state.

David E. Box (2):
  PCI: vmd: Add vmd_device_data
  PCI: vmd: Configure PCIe ASPM and LTR

Michael Bottini (1):
  PCI/ASPM: Add ASPM BIOS override function

 drivers/pci/controller/vmd.c | 134 ++++++++++++++++++++++++++++-------
 drivers/pci/pcie/aspm.c      |  54 ++++++++++++++
 include/linux/pci.h          |   7 ++
 3 files changed, 169 insertions(+), 26 deletions(-)


base-commit: 754e0b0e35608ed5206d6a67a791563c631cec07

Comments

Jonathan Derrick March 1, 2022, 7:19 p.m. UTC | #1

Set looks good to me
Thanks!

Reviewed-by: Jon Derrick <[e-mail]>

On 2/28/2022 9:19 PM, David E. Box wrote:
> This series adds support for enabling PCIe ASPM and for setting PCIe LTR
> values on devices on root ports reserved by VMD. Configuration of these
> capabilities is usually done by BIOS. But for VMD ports these capabilities
> will not be configured because those ports are not visible to BIOS. For
> future products, post Alder Lake, the hardware team has agreed to do this
> enabling in BIOS.  But this will not apply to current products, so this
> work around is provided for them. Without this, laptops running in VMD mode
> will not be able to power gate roots ports, resulting in higher power
> consumption.
> 
> Since V4 we have more information from the BIOS team as to why BIOS
> needs to program device LTRs. This is something that should be done by
> devices, but there are many that don't provide LTR values causing them
> to block SoC level power management. BIOS sets an initial default LTR to
> account for such devices. This SoC specific value is the maximum latency
> required to allow the SoC to enter the deepest power state.
> 
> David E. Box (2):
>    PCI: vmd: Add vmd_device_data
>    PCI: vmd: Configure PCIe ASPM and LTR
> 
> Michael Bottini (1):
>    PCI/ASPM: Add ASPM BIOS override function
> 
>   drivers/pci/controller/vmd.c | 134 ++++++++++++++++++++++++++++-------
>   drivers/pci/pcie/aspm.c      |  54 ++++++++++++++
>   include/linux/pci.h          |   7 ++
>   3 files changed, 169 insertions(+), 26 deletions(-)
> 
> 
> base-commit: 754e0b0e35608ed5206d6a67a791563c631cec07