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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E65.mail.protection.outlook.com (10.167.249.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7849.8 via Frontend Transport; Wed, 7 Aug 2024 15:17:27 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 7 Aug 2024 10:17:26 -0500 Received: from ubuntu.mshome.net (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Wed, 7 Aug 2024 10:17:24 -0500 From: Stewart Hildebrand To: Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "Michael Ellerman" , Nicholas Piggin , Christophe Leroy , "Naveen N. Rao" , Thomas Zimmermann , "Arnd Bergmann" , Sam Ravnborg , Yongji Xie , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Philipp Stanner CC: Stewart Hildebrand , , , , Subject: [PATCH v3 0/8] PCI: Align small BARs Date: Wed, 7 Aug 2024 11:17:09 -0400 Message-ID: <20240807151723.613742-1-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E65:EE_|DM4PR12MB8523:EE_ X-MS-Office365-Filtering-Correlation-Id: 2586882c-a4fe-4973-d731-08dcb6f40c58 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|36860700013|82310400026|921020; X-Microsoft-Antispam-Message-Info: MvetW+L7jH8+Spr+g6axWt3hPcykMqFaCb8vhnp5ZLZ/f8IIB0dvZG8belKyNiMyjgZProDYeeuuqzedI3JTo9Dt+nCvty0zkPE9s3c0lEk6s90nArwf0H8d6b8WZJNZpQPv0598pXN3RvuwFSMQMxkMFIDX8fs+JeWBUAD/hDL+juol50Bz06GLGH3HsVfh7g4Jg8/wTHg++Y5wSl8Y7ybcS6F3zDhw+60hdMFHDlXZ3QOtbXpuKz+d/u6szgW6zt2bKALzHlytZqncwUZh+0blFzbEEgsAR+F4cQBKoQuZAMaeDqvOH8NmeF+II2jUHWl9jqQ5fzwkpW/WzhtddrJwJE1fp8m7uS/BJRPvE+HViipOySxRMb2W7kvkuqdaSCUNkWh64u31mwuNl17pmJcpZb9gYNcu2inNgNWe7LC01tUgu5X5Sq8ohRY4+E02WylgmSAPMF+KfgEPlV8i+BL4Cv9a1QN1vm4mbrEKBMRWcLXA6uaeAJEsqotznr9+f3XdJnOQcL5EUb8aKjDr2w/rkxqzpIHo4OIGr3i6oNp+XoNtpKrBEGcXOi2tPbSp2PAzexV3xsOpR6PZZO932p+oBP7+pXy/yoL9EqxLnFCfttck+fAxiRD8/ARDUUOUIYQgrFl/BR44Bs457A8Js2xzk+OsjSY/mGtCuJF5ZBgjq5UG4cZGQrBqNt6tyUPo3vvausnpsifOG86y9eohuwggyJG70szfMbPoZ+zJBw9Ml167RT9GNkIT5grihoKNnlQJnDxCVW2Yg0FG4uAySB0SWncueRPJjgi5FwN7+bPauLFOVY6uKXj2arEFTlUal1qSFZTy5Qd5ElNItXl/X6MKwMb9cwGy0kbzeIHuyuVYgcMbHY1p0OQd3ZvvJDxVbqpmBt0y3r62SFn6Ek5zhv35HJHymoNKR9jSdyy2GV03XedISUboGiPfS6kw5iJfYlBUQIPTnxBE1zZ6/LsB88bl/V15HEzcT0vsglBYJ/pyivXIRh/JWZg5xMEEIEnX9mLGyDrFV2lCZh0/rXhsXo+xds6HIcvacT8sscsU9cOMEEyPYf/PkK4IkxIOSjjuXESzaAsb6OVD4N8yydPkS2vcwsZ6bke8Q+FhcJxEsgLpT1K/qsGYqEz9hZLe6xdgZTJjfSx76ylgp1YO6ctNLLdE/nMlcC0/COVyA5WhVg9DWVV3lhEBbFJc65RRwivLRJjrgR8O1x+Haq0Ydbk1PI6i+VnSwNo98jndROpIz6Uzn4Mc1PTtZMFLyegJLkrbXbNtbwN91oX88tI9icUldQIzFS94+9NOgpK+aLaYY4G9OvY4+57sanHghZ+ELafvnZlaaf+/qqPonD14T2H1Blum/XImGZLn5hYSWvjqg2tnCyfdpcjdBIgG0HvNxdnKplLfX2GzQ1kUyLPPIuGulA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(36860700013)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Aug 2024 15:17:27.4567 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2586882c-a4fe-4973-d731-08dcb6f40c58 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E65.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8523 In this context, "small" is defined as max(SZ_4K, PAGE_SIZE). This series sets the default minimum resource alignment to max(SZ_4K, PAGE_SIZE) for memory BARs. In preparation, it makes an optimization and addresses some corner cases observed when reallocating BARs. I consider the prepapatory patches to be prerequisites to changing the default BAR alignment. I considered introducing checks for the specific scenarios described, but chose not to pursue this. A check such as "if (xen_domain())" may be pretty simple, but that doesn't account for other hypervisors. If other hypervisors are to be considered, or if we try to dynamically reallocate BARs for devices being marked for passthrough, such a check may quickly grow unwieldy. Further, checking for the MSI-X tables residing in a small (<4k) BAR is unlikely to be a one-liner. Making 4k alignment the default seems more robust. Lastly, when using IORESOURCE_STARTALIGN, all resources in the system need to be aligned. I considered alternatively adding new functionality to the pci=resource_alignment= option, but that approach was already attempted and decided against [1]. [1] https://lore.kernel.org/linux-pci/1473757234-5284-4-git-send-email-xyjxie@linux.vnet.ibm.com/ v2->v3: * clarify 4k vs PAGE_SIZE * rename ("x86/PCI: Move some logic to new function") to ("x86/PCI: Improve code readability") * rename ("PCI: Align small (<4k) BARs") to ("PCI: Align small BARs") v1->v2: * rename ("PCI: don't clear already cleared bit") to ("PCI: Don't unnecessarily disable memory decoding") * new patch: ("x86/PCI: Move some logic to new function") * new patch: ("powerpc/pci: Preserve IORESOURCE_STARTALIGN alignment") Stewart Hildebrand (8): x86/PCI: Improve code readability PCI: Don't unnecessarily disable memory decoding PCI: Restore resource alignment PCI: Restore memory decoding after reallocation x86/PCI: Preserve IORESOURCE_STARTALIGN alignment powerpc/pci: Preserve IORESOURCE_STARTALIGN alignment PCI: Don't reassign resources that are already aligned PCI: Align small BARs arch/powerpc/kernel/pci-common.c | 6 +++-- arch/x86/pci/i386.c | 38 +++++++++++++++------------ drivers/pci/pci.c | 43 +++++++++++++++++++++++-------- drivers/pci/setup-bus.c | 44 ++++++++++++++++++++++++++++++++ include/linux/pci.h | 2 ++ 5 files changed, 103 insertions(+), 30 deletions(-)