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Sun, 22 Sep 2024 01:14:22 -0500 From: Thippeswamy Havalige To: , , , , , , CC: , , , , , , Thippeswamy Havalige Subject: [PATCH v3 0/2] Add support for CPM5 controller 1 Date: Sun, 22 Sep 2024 11:43:16 +0530 Message-ID: <20240922061318.2653503-1-thippesw@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D4:EE_|DS0PR12MB6630:EE_ X-MS-Office365-Filtering-Correlation-Id: eab603e7-0470-4bf0-1d51-08dcdacdcff1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: ff6J78fgjasKcjJrumxyGAEyIAkTSLjpG0gATBgAktvoW+KvYnEtvf84tqQ6No/smYlXd2Su3BceZgRl7tVkJmoxTAFMa1MBiN7kJbkJ8yvubLrrETaevlOATatY75GjGiWlmqJIYtLkuileLzoCKM3QE6PG92QV886O3ovIfLgyrYy2ZMyO9sB+0CQTBA9oURzK4AuTMVWY8UlNJxUhcS/syKxhj1VND03oaZBM1AvBYen5GlP6ZRM12QRR55WRCHIj4pQSRXCp1kPPQdmFgQSrWyuJ+WVxP0qOn3o5E6LkS0FfgPCd54kOE/Q9lbO/XKQPTlo9F0nu8oynkl6KrzgRFKu4SKsFJW7S7x2FQ15NGJC47DuXSBv9QvvC+WZdcRmlc2jPtTAIICnPjFHNlAO7YLTeF+QLHBK+3fMKC3ziOw9n1gxd74q0B3OGk2IynVh55E7PpJugS/yxSFsYbehBA9GbOG6xBx6cZkdZ6MRBZnx604NBAU77P2j+x5K+soUpvjCBbq3ParPzQGyC5o+QekE8bXBz6dZGQeFmlV0gdiFfh4eb75GSpdCGtnOVgnYj3qskcCo5nLrYVOZWLB6+arBleoJtP1kpXGU95OsvAQri03d/MOlkk+H4YD3MBUQtdVnBOMkeYXbA7kyOquQYEmFBwZUDW/BJr5JeMKkkUcla+jJ+C1xz4xpDuzlbQzA9+6l7BU8btMqd1lq55p8D4pIb0I7OIEhJGQEYhAelbl95fu33jywMtfrSaCsHo2RQP+1Aseg7Dbm8UbYs6e0YG9zepPPW7W1ZM6fZ2l1KEmFDcE9+FrYTM8izY8ttvp8HcVNMxPn3Al4LtHs3aTC0rK5xoACLybsT6wl+bpMqhD9zseCaI2ylVstlZ/S44pk4msk9eUfdIS4yfaQt/WL4OPi4KlgQpwoS50KI4J3OATIXBZ/azWRoMZfYCJDgBtmfjUeV7/rjzVjq0vFsKad4ZwM+TfwcjfJzPtSyaGUEvFcqQCLBYTVbQwLIW1C/xWZGImDkOhl50qAfH/5ObosLXX+hDG3yliVwHilHh1r0NSql7eZduUevCEsxx9y0xCHZ8NoQy6g8W1BBsZGFFto9n8+Tg8F1VCIvubWzNZNzCy9Ny/TIHES3W5c2niQieAqJxZTmsHE9GFge5W4xzcBlRBD0i7Om7AbSrrJLHNSjGiwF8KDZeKtF8ttCv3zQnLT4dd6SUxGd7p7wbw+9qpjx8REIQJobpPVDk9QhYjT5Cpkv70Nwxtxzj+njhAnVuTfMzKidr61EtnzOniUCl6c6KYB0x5KRnfkDSQ6WPQ4p5mPNmJWEFUR4hA/15vzSE6wlhqvJJRnKGqLT/odupJrd7B6pcptlLLEgixCKzEhJnku1p/PR5j9segfL5ya3 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2024 06:14:27.0510 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eab603e7-0470-4bf0-1d51-08dcdacdcff1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6630 This patch series introduces support for the second Root Port controller in the Xilinx Versal Premium CPM5 block. The Versal Premium platform features two Type-A Root Port controllers operating at Gen5 speed. However, the error interrupt registers and their corresponding bits are located at different offsets for Controller 0 and Controller 1. To handle these differences, the series includes: A new compatible string for the second Root Port controller in the device tree bindings. Driver updates to manage platform-specific interrupt registers and offsets for both controllers using the new compatible string. Thippeswamy Havalige (2): dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1 PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller 1 .../bindings/pci/xilinx-versal-cpm.yaml | 1 + drivers/pci/controller/pcie-xilinx-cpm.c | 50 +++++++++++++++---- 2 files changed, 40 insertions(+), 11 deletions(-)